公开(公告)号：DE69523556D1

公开(公告)日：2001-12-06

申请号：DE69523556

申请日：1995-08-23

Applicant: PIXTECH SA

Inventor： CLERC JEAN-FREDERIC

IPC: H01J29/87 ,  H01J29/02 ,  H01J29/82 ,  H01J29/94 ,  H01J31/12

Abstract: PCT No. PCT/FR95/01105 Sec. 371 Date Jul. 29, 1996 Sec. 102(e) Date Jul. 29, 1996 PCT Filed Aug. 23, 1995 PCT Pub. No. WO96/06450 PCT Pub. Date Feb. 29, 1996A flat display screen has a cathode including microtips for electronic bombardment associated with a gate, an anode including phosphor elements, and an inter-electrode gap. The screen includes an apertured insulating plate defining the inter-electrode gap associated with means for maintaining the plate apart from the anode.

公开(公告)号：DE69523556T2

公开(公告)日：2002-10-10

申请号：DE69523556

申请日：1995-08-23

Applicant: PIXTECH SA

Inventor： CLERC JEAN-FREDERIC

IPC: H01J29/87 ,  H01J29/02 ,  H01J29/82 ,  H01J29/94 ,  H01J31/12

Abstract: PCT No. PCT/FR95/01105 Sec. 371 Date Jul. 29, 1996 Sec. 102(e) Date Jul. 29, 1996 PCT Filed Aug. 23, 1995 PCT Pub. No. WO96/06450 PCT Pub. Date Feb. 29, 1996A flat display screen has a cathode including microtips for electronic bombardment associated with a gate, an anode including phosphor elements, and an inter-electrode gap. The screen includes an apertured insulating plate defining the inter-electrode gap associated with means for maintaining the plate apart from the anode.

公开(公告)号：DE69512722T2

公开(公告)日：2000-04-06

申请号：DE69512722

申请日：1995-08-02

Applicant: PIXTECH SA

Inventor： CLERC JEAN-FREDERIC

IPC: H01J9/02 ,  H01J1/304 ,  H01J29/04 ,  H01J31/12 ,  H01J1/30

Abstract: The cathode (1) includes an insulating substrate (10) and a resistive layer (11) which supports an array of micro-tips (2). Cathode conductors (13) are placed on top of the resistive layer over a thin conductor coat (19). The conductors are organised in columns (15) each column encompassing a large number of micro-tips. The micro-tips are located in the centre of circular openings (17) present along the cathode conductors. Each micro-tip is thus separated from the conductor by a circular area of same resistivity. A control grid (3) is associated with the cathode and separated from the conductors by two insulating layers (16,18).

公开(公告)号：DE69512722D1

公开(公告)日：1999-11-18

申请号：DE69512722

申请日：1995-08-02

Applicant: PIXTECH SA

Inventor： CLERC JEAN-FREDERIC

IPC: H01J9/02 ,  H01J1/304 ,  H01J29/04 ,  H01J31/12 ,  H01J1/30

Abstract: The cathode (1) includes an insulating substrate (10) and a resistive layer (11) which supports an array of micro-tips (2). Cathode conductors (13) are placed on top of the resistive layer over a thin conductor coat (19). The conductors are organised in columns (15) each column encompassing a large number of micro-tips. The micro-tips are located in the centre of circular openings (17) present along the cathode conductors. Each micro-tip is thus separated from the conductor by a circular area of same resistivity. A control grid (3) is associated with the cathode and separated from the conductors by two insulating layers (16,18).