公开(公告)号：AT476019T

公开(公告)日：2010-08-15

申请号：AT03810032

申请日：2003-01-24

Applicant: QUALCOMM INC

Inventor： CICCARELLI STEVEN ,  RAGHUPATHY ARUN

IPC: H04B1/30 ,  H03G3/30

公开(公告)号：ZA9901713B

公开(公告)日：1999-11-24

申请号：ZA9901713

申请日：1999-03-03

Applicant: QUALCOMM INC

Inventor： CICCARELLI STEVEN ,  PETERZELL PAUL E ,  KAUFMAN RALPH E

IPC: H03F1/32 ,  H03F1/02 ,  H03F1/26 ,  H03F1/34 ,  H03G1/00 ,  H03G3/18 ,  H03G3/20 ,  H04B1/10 ,  H04B1/16 ,  H03F ,  H03G

CPC classification number: H03G3/3068 ,  H03F1/0261 ,  H03F1/342 ,  H03F2200/294 ,  H03F2200/331 ,  H03F2200/372 ,  H03G1/0088 ,  H04B1/1027 ,  H04B1/109

公开(公告)号：CA2587650A1

公开(公告)日：2006-05-26

申请号：CA2587650

申请日：2005-11-17

Applicant: QUALCOMM INC

Inventor： CICCARELLI STEVEN ,  RAGHUPATHY ARUN ,  BANISTER BRIAN C

IPC: H04B1/10 ,  H03H7/12 ,  H03H17/02 ,  H04B1/707

Abstract: A technique for noise reduction in a wireless communication system uses controllable bandwidth filters (120) to filter a received signal. In a typical implementation, the filters (120) are used at baseband frequencies. A measurement (RSSI) is indicative of the strength of the received signal. A control circuit (144) generates a control signal (146) to control the bandwidth of the filters (120). If the received signal strength is above a first threshold, a wider bandwidth may be used for the filters (120). If the received signal is below a second threshold, the control circuit (144) generates the control signal (146) to set the filters (120) to a more narrow bandwidth. The system (100) may also be used with digital filters (150, 152) following digitization by analog to digital converters (ADCs) (130, 132). The system (100) is particularly well-suited for operation with noise-shaped ADCs (130, 132), such as Delta-Sigma converters.

公开(公告)号：ZA991713B

公开(公告)日：1999-11-24

申请号：ZA991713

申请日：1999-03-03

Applicant: QUALCOMM INC

Inventor： CICCARELLI STEVEN ,  PETERZELL PAUL E ,  KAUFMAN RALPH E

IPC: H03F1/02 ,  H03F1/26 ,  H03F1/32 ,  H03F1/34 ,  H03G1/00 ,  H03G3/18 ,  H03G3/20 ,  H04B1/10 ,  H04B1/16 ,  H03F ,  H03G

Abstract: An amplifier having an adjustable current source which can be controlled to provide the requisite level of performance at reduced current consumption. The amplifier is first designed using one of many designs available and known in the art. A current source is then designed to provide adjustable bias current for the amplifier. The current source can be designed with MOSFETs which require no additional bias current and can accept a standard digital control signal. The current source can also be designed with active devices which are selected based on the logic of the control signals for ease of interface. The bias current determines the linearity and noise performance of the amplifier. The bias current is adjusted to provide the requisite level of performance while reducing power consumption. The current source can be designed to operate in discrete steps or to have substantially continuous current steps.