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公开(公告)号:NO993870D0
公开(公告)日:1999-08-11
申请号:NO993870
申请日:1999-08-11
Applicant: QUALCOMM INC
Inventor: HUTCHISON IV JAMES A
Abstract: A portable communications device and accessory system which provides full-duplex asynchronous communications between a portable communication device and external accessories over a synchronous digital interface. The system includes a digital signal processor for generating a first synchronous digital voice signal, a UART for generating a first asynchronous data signal, and a microprocessor for generating a synchronous control command signal. The system further includes a first multiplexer for multiplexing the first synchronous digital voice signal and the first asynchronous data signal and the synchronous control command signal onto an interface line. The interface line couples the communication device to the at least one external accessory. A second multiplexer is coupled to the interface line, for routing the first synchronous digital voice signal and the synchronous control command signal to the at least one synchronous internal device, and for routing the first asynchronous data signal to the asynchronous internal device.
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公开(公告)号:NO20002955D0
公开(公告)日:2000-06-09
申请号:NO20002955
申请日:2000-06-09
Applicant: QUALCOMM INC
Inventor: HEIMBIGNER WADE LYLE , HUTCHISON IV JAMES A , OLIVEIRA LOUIS D
Abstract: An audio band processor and a method and circuit for controlling its gain. The audio band processor comprises a first variable gain amplifier for receiving an analog audio signal; an analog to digital converter for converting the analog audio signal to a digital audio signal; and an interface circuit for encoding the digital audio signal. The interface circuit also arranges the digital audio signal into a sequence of encoded transmit frames, and receives a sequence of encoded receive frames, each receive frame comprising a predetermined number of encoded digital audio signal data bits and a predetermined number of digital gain control bits. The interface circuit also adjusts a gain level of the first variable gain amplifier in response to the digital gain control bits. In another embodiment, the audio band processor further comprises a second variable gain amplifier, and the interface circuit adjusts a gain level of the second variable gain amplifier in response to the digital gain control bits.
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公开(公告)号:NO991578D0
公开(公告)日:1999-03-30
申请号:NO991578
申请日:1999-03-30
Applicant: QUALCOMM INC
Inventor: HUTCHISON IV JAMES A , WIECK CHRIS P
Abstract: A method for adjusting the gain of a receive circuit, thereby improving a receiver's immunity to interference. The circuit has an LNA which amplifies the received signal (1702). The receive signal power is controlled by enabling or disabling the LNA in response to the measured received signal power (1704). The received power level is periodically compared to a threshold (1704). When the received power level is greater than the threshold, the LNA is disabled (1706). The LNA is re-enabled when the received power level is less than the threshold (1708), and there are no significant intermodulation components detected (1710). The intermodulation components are detected by briefly enabling the LNA and detecting the resultant change in the measured signal power (1710). If the detected change is more than a predetermined amount, then there are significant intermodulation components present, and the LNA is not re-enabled (1706). Otherwise, there are not significant intermodulation components present, and the LNA is re-enabled (1702).
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公开(公告)号:FI990710A0
公开(公告)日:1999-03-30
申请号:FI990710
申请日:1999-03-30
Applicant: QUALCOMM INC
Inventor: HUTCHISON IV JAMES A , WIECK CHRIS P
Abstract: A method for adjusting the gain of a receive circuit, thereby improving a receiver's immunity to interference. The circuit has an LNA which amplifies the received signal (1702). The receive signal power is controlled by enabling or disabling the LNA in response to the measured received signal power (1704). The received power level is periodically compared to a threshold (1704). When the received power level is greater than the threshold, the LNA is disabled (1706). The LNA is re-enabled when the received power level is less than the threshold (1708), and there are no significant intermodulation components detected (1710). The intermodulation components are detected by briefly enabling the LNA and detecting the resultant change in the measured signal power (1710). If the detected change is more than a predetermined amount, then there are significant intermodulation components present, and the LNA is not re-enabled (1706). Otherwise, there are not significant intermodulation components present, and the LNA is re-enabled (1702).
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公开(公告)号:FI990710A
公开(公告)日:1999-03-30
申请号:FI990710
申请日:1999-03-30
Applicant: QUALCOMM INC
Inventor: HUTCHISON IV JAMES A , WIECK CHRIS P
Abstract: A method for adjusting the gain of a receive circuit, thereby improving a receiver's immunity to interference. The circuit has an LNA which amplifies the received signal (1702). The receive signal power is controlled by enabling or disabling the LNA in response to the measured received signal power (1704). The received power level is periodically compared to a threshold (1704). When the received power level is greater than the threshold, the LNA is disabled (1706). The LNA is re-enabled when the received power level is less than the threshold (1708), and there are no significant intermodulation components detected (1710). The intermodulation components are detected by briefly enabling the LNA and detecting the resultant change in the measured signal power (1710). If the detected change is more than a predetermined amount, then there are significant intermodulation components present, and the LNA is not re-enabled (1706). Otherwise, there are not significant intermodulation components present, and the LNA is re-enabled (1702).
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公开(公告)号:NO326176B1
公开(公告)日:2008-10-13
申请号:NO20002955
申请日:2000-06-09
Applicant: QUALCOMM INC
Inventor: HEIMBIGNER WADE LYLE , OLIVEIRA LOUIS D , HUTCHISON IV JAMES A
Abstract: An audio band processor and a method and circuit for controlling its gain. The audio band processor comprises a first variable gain amplifier for receiving an analog audio signal; an analog to digital converter for converting the analog audio signal to a digital audio signal; and an interface circuit for encoding the digital audio signal. The interface circuit also arranges the digital audio signal into a sequence of encoded transmit frames, and receives a sequence of encoded receive frames, each receive frame comprising a predetermined number of encoded digital audio signal data bits and a predetermined number of digital gain control bits. The interface circuit also adjusts a gain level of the first variable gain amplifier in response to the digital gain control bits. In another embodiment, the audio band processor further comprises a second variable gain amplifier, and the interface circuit adjusts a gain level of the second variable gain amplifier in response to the digital gain control bits.
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公开(公告)号:MXPA02003856A
公开(公告)日:2002-12-13
申请号:MXPA02003856
申请日:2000-10-19
Applicant: QUALCOMM INC
Inventor: HUTCHISON IV JAMES A
Abstract: Un metodo y un aparato para actualizar almacenar el valor de un contador. En respuesta a cada uno de una pluralidad de N senales de actualizacion de contador, se selecciona una celula de memoria binaria (350) de una pluralidad de celulas de memoria binarias el estado de la celula de memoria binaria seleccionada e invertido (360). Despues de que son recibidas las senales de actualizacion del contador (320), un registro que esta separado de la pluralidad de celulas de memoria binarias se incrementa (340), y, el proceso se repite entonces e n respuesta a senales de actualizacion de contador adicionales (320). Cada una de la pluralidad de celulas de memoria binarias es invertida en promedio un numero igual de veces durante cada repeticion de proceso. Los estados de la pluralidad de celulas de memoria binaria y el valor del registro representan el valor del contador en cualquier tiempo dado.
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公开(公告)号:NO993870A
公开(公告)日:1999-09-24
申请号:NO993870
申请日:1999-08-11
Applicant: QUALCOMM INC
Inventor: HUTCHISON IV JAMES A
CPC classification number: H04W88/02 , H04M1/6075
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公开(公告)号:NO993870L
公开(公告)日:1999-09-24
申请号:NO993870
申请日:1999-08-11
Applicant: QUALCOMM INC
Inventor: HUTCHISON IV JAMES A
Abstract: A portable communications device and accessory system which provides full-duplex asynchronous communications between a portable communication device and external accessories over a synchronous digital interface. The system includes a digital signal processor for generating a first synchronous digital voice signal, a UART for generating a first asynchronous data signal, and a microprocessor for generating a synchronous control command signal. The system further includes a first multiplexer for multiplexing the first synchronous digital voice signal and the first asynchronous data signal and the synchronous control command signal onto an interface line. The interface line couples the communication device to the at least one external accessory. A second multiplexer is coupled to the interface line, for routing the first synchronous digital voice signal and the synchronous control command signal to the at least one synchronous internal device, and for routing the first asynchronous data signal to the asynchronous internal device.
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公开(公告)号:NO991578L
公开(公告)日:1999-05-28
申请号:NO991578
申请日:1999-03-30
Applicant: QUALCOMM INC
Inventor: HUTCHISON IV JAMES A , WIECK CHRIS P
Abstract: A method for adjusting the gain of a receive circuit, thereby improving a receiver's immunity to interference. The circuit has an LNA which amplifies the received signal (1702). The receive signal power is controlled by enabling or disabling the LNA in response to the measured received signal power (1704). The received power level is periodically compared to a threshold (1704). When the received power level is greater than the threshold, the LNA is disabled (1706). The LNA is re-enabled when the received power level is less than the threshold (1708), and there are no significant intermodulation components detected (1710). The intermodulation components are detected by briefly enabling the LNA and detecting the resultant change in the measured signal power (1710). If the detected change is more than a predetermined amount, then there are significant intermodulation components present, and the LNA is not re-enabled (1706). Otherwise, there are not significant intermodulation components present, and the LNA is re-enabled (1702).
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