公开(公告)号：DE602006015621D1

公开(公告)日：2010-09-02

申请号：DE602006015621

申请日：2006-03-01

Applicant: QUALCOMM INC

Inventor： LIANG YI ,  EL-MALEH KHALED HELMI

IPC: H04N7/26 ,  H04N7/50

公开(公告)号：AT475265T

公开(公告)日：2010-08-15

申请号：AT06736529

申请日：2006-03-01

Applicant: QUALCOMM INC

Inventor： LIANG YI ,  EL-MALEH KHALED HELMI

IPC: H04N7/26 ,  H04N7/50

Abstract: The disclosure is directed to adaptive frame skipping techniques for rate controlled video encoding of a video sequence. According to the disclosed techniques, an encoder performs frame skipping in an intelligent manner that can improve video quality of the encoded sequence relative to encoding using conventional frame skipping. In particular, the disclosed frame skipping scheme is adaptive and considers motion activity of the video frames in order to identify certain frames that can be skipped without sacrificing significant video quality. The described frame skipping techniques may take into account the tradeoff between spatial and temporal quality of different video frames. In this manner, the techniques can allocate limited resources between the spatial and temporal quality in a way that can improve the visual appearance of a video sequence.

公开(公告)号：AT487329T

公开(公告)日：2010-11-15

申请号：AT06760483

申请日：2006-05-25

Applicant: QUALCOMM INC

Inventor： LIANG YI ,  MANJUNATH SHARATH

IPC: H04N7/26 ,  H04N7/30

Abstract: This disclosure describes deblock filtering techniques in which an in-loop deblock filter of a first codec is used as a post deblock filter of a second codec. A number of techniques are also described to facilitate input parameter adjustments and allow for the effective use of the filter with both codecs. The techniques can simplify the architecture of a device that includes multiple codecs operating according to different coding standards. Specifically, the different codecs can use the same deblocking filter regardless of whether the coding standard calls for in-loop filtering or whether post filtering is used. For example, a filter designed as an in-loop deblocking filter for a codec that complies with the ITU-T H.264 coding standard can be used as a post deblocking filter for MPEG-4 video.

公开(公告)号：MXPA06010360A

公开(公告)日：2007-01-19

申请号：MXPA06010360

申请日：2005-03-09

Applicant: QUALCOMM INC

Inventor： EL-MALEH KHALED HELMI ,  LIANG YI

IPC: H04N7/26 ,  H04N7/50

Abstract: Se muestran metodos y aparatos para reducir la complejidad computacional de las decisiones en modo de codificacion mediante la explotacion de las correlaciones a traves de decisiones en modo de codificacion espacial y/o temporalmente cercano; una decision de modo para un macrobloque actual se basa en las decisiones de modo de macrobloques espacial y/o temporalmente cercanos.

公开(公告)号：AT524019T

公开(公告)日：2011-09-15

申请号：AT06718489

申请日：2006-01-13

Applicant: QUALCOMM INC

Inventor： LIANG YI ,  MOLLOY STEPHEN

IPC: H04N7/26

Abstract: In one embodiment, this disclosure provides an encoding device comprising a mode selection engine that performs mode selection for intra-prediction encoding regardless of whether the encoding device is programmed to comply with first encoding standard or a second encoding standard. The device also includes a first encoder to perform the intra-prediction encoding according to the selected mode in compliance with the first encoding standard when the encoding device is programmed to comply with the first encoding standard, and a second encoder to perform the intra-prediction encoding according to the selected mode in compliance with the second encoding standard when the encoding device is programmed to comply with the second encoding standard. The techniques can simplify mode selection in support of multiple different intra-prediction encoding standards.

公开(公告)号：DE602006017998D1

公开(公告)日：2010-12-16

申请号：DE602006017998

申请日：2006-05-25

Applicant: QUALCOMM INC

Inventor： LIANG YI ,  MANJUNATH SHARATH

IPC: H04N7/26 ,  H04N7/30

公开(公告)号：WO2006042323A3

公开(公告)日：2006-09-08

申请号：PCT/US2005037072

申请日：2005-10-12

Applicant: QUALCOMM INC ,  LIANG YI ,  EL-MALEH KHALED HELMI ,  MANJUNATH SHARATH

Inventor： LIANG YI ,  EL-MALEH KHALED HELMI ,  MANJUNATH SHARATH

IPC: H04N19/89 ,  H04N7/50

CPC classification number: H04N19/00278 ,  H04N19/107 ,  H04N19/14 ,  H04N19/147 ,  H04N19/164 ,  H04N19/172 ,  H04N19/176 ,  H04N19/61 ,  H04N19/89

Abstract: An adaptive Intra-refresh (IR) technique for digital video encoding adjusts IR rate based on video content, or a combination of video content and channel condition. The IR rate may be applied at the frame level or macroblock (MB) level. At the frame level, the IR rate specifies the percentage of MBs to be Intra-coded within the frame. At the MB level, the IR rate defines a statistical probability that a particular MB is to be Intra-coded. The IR rate is adjusted in proportion to a combined metric that weighs estimated channel loss probability, frame-to-frame variation, and texture information. The IR rate can be determined using a close-form solution that requires relatively low implementation complexity. For example, such a close-form does not require iteration or an exhaustive search. In addition, the IR rate can be determined from parameters that are available before motion estimation and compensation are performed.

Abstract translation: 用于数字视频编码的自适应内部刷新（IR）技术基于视频内容或视频内容和频道条件的组合来调整IR速率。 可以在帧级或宏块（MB）级应用IR速率。 在帧级别，IR速率指定帧内帧内编码的百分比。 在MB级别，IR率定义了特定MB被内部编码的统计概率。 IR速率与重量估计的信道丢失概率，帧到帧变化和纹理信息的组合度量成比例地调整。 IR速率可以使用需要较低实现复杂度的紧密形式的解决方案来确定。 例如，这种关闭形式不需要迭代或穷尽搜索。 另外，可以在执行运动估计和补偿之前可用的参数来确定IR速率。

公开(公告)号：WO2006128081A2

公开(公告)日：2006-11-30

申请号：PCT/US2006020642

申请日：2006-05-25

Applicant: QUALCOMM INC ,  LIANG YI ,  MANJUNATH SHARATH

Inventor： LIANG YI ,  MANJUNATH SHARATH

IPC: H04N7/26 ,  H04N7/30

CPC classification number: H04N19/86 ,  H04N19/117 ,  H04N19/42 ,  H04N19/61 ,  H04N19/82

Abstract: This disclosure describes deblock filtering techniques in which an in-loop deblock filter of a first codec is used as a post deblock filter of a second codec. A number of techniques are also described to facilitate input parameter adjustments and allow for the effective use of the filter with both codecs. The techniques can simplify the architecture of a device that includes multiple codecs operating according to different coding standards. Specifically, the different codecs can use the same deblocking filter regardless of whether the coding standard calls for in-loop filtering or whether post filtering is used. For example, a filter designed as an in-loop deblocking filter for a codec that complies with the ITU-T H.264 coding standard can be used as a post deblocking filter for MPEG-4 video.

Abstract translation: 本公开描述了去块滤波技术，其中第一编解码器的循环去块滤波器被用作第二编解码器的后去块滤波器。 还描述了许多技术来促进输入参数调整并允许有效地使用具有两个编解码器的滤波器。 这些技术可以简化包括根据不同编码标准操作的多个编解码器的设备的架构。 具体来说，不管编码标准是要求进行环路过滤还是使用后置过滤，不同的编解码器都可以使用相同的去块滤波器。 例如，设计为符合ITU-T H.264编码标准的编解码器的内循环去块滤波器的滤波器可以用作MPEG-4视频的后去块滤波器。

公开(公告)号：WO2007146570A2

公开(公告)日：2007-12-21

申请号：PCT/US2007069561

申请日：2007-05-23

Applicant: QUALCOMM INC ,  KING SCOTT HOWARD ,  JALIL SUHAIL ,  LIANG YI

Inventor： KING SCOTT HOWARD ,  JALIL SUHAIL ,  LIANG YI

CPC classification number: G09G5/397 ,  G09G2340/125 ,  G09G2360/122

Abstract: Image processing techniques are described that reduce the amount of bandwidth required to read an image from memory for display. According to the techniques, a processor stores low change rate display layers in a memory such that a processor can read the display layers from the memory using a reduced amount of processing resources. An overlay module blends low change rate display layers into a combined overlay layer. A processor reads the overlay layer from the memory and selectively processes the overlay layer based on processing information for the overlay layer recorded in memory. The processor then blends the overlay layer and a high change rate video display layer to update a single image for display according to a high change rate. In addition, the overlay module updates the overlay layer based on the low change rate display layers according to a low change rate.

Abstract translation: 描述了图像处理技术，其减少了从显示存储器读取图像所需的带宽量。 根据该技术，处理器将低变化率显示层存储在存储器中，使得处理器可以使用减少量的处理资源从存储器读取显示层。 覆盖模块将低变化率显示层混合到组合覆盖层中。 处理器从存储器读取覆盖层，并且基于记录在存储器中的覆盖层的处理信息选择性地处理覆盖层。 然后，处理器将覆盖层和高变化率视频显示层混合以更新单个图像以根据高变化率显示。 此外，覆盖模块根据低变化率基于低变化率显示层更新覆盖层。