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公开(公告)号:AU2016282579A1
公开(公告)日:2017-11-30
申请号:AU2016282579
申请日:2016-06-17
Applicant: QUALCOMM INC
Inventor: ROSENBERG OFER , GIL AMIT , PANIAN JAMES LIONEL , PATEL PIYUSH , YIFRACH SHAUL YOHAI
IPC: G06F13/24
Abstract: Extended message signaled interrupts (MSI) data are disclosed. In one aspect, MSI bits are modified to include a system level identifier. In an exemplary aspect, an upper sixteen bits of the MSI message data are modified to be the system level identifier. By providing the system level identifier within the MSI message data, an interrupt controller can verify the interrupt source.
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公开(公告)号:AU2016283926A1
公开(公告)日:2017-11-30
申请号:AU2016283926
申请日:2016-06-01
Applicant: QUALCOMM INC
Inventor: ROSENBERG OFER , GIL AMIT , PANIAN JAMES LIONEL , PATEL PIYUSH , YIFRACH SHAUL YOHAI
IPC: G06F13/42
Abstract: A PCIe system includes a host system (304) and at least one PCIe endpoint (302). The PCIe endpoint is configured to determine one or more transaction-specific attributes that can improve efficiency and performance of a predefined host transaction. The PCIe endpoint encodes the transaction-specific attributes in a transaction layer packet (TLP) prefix of at least one PCIe TLP and provides the PCIe TLP to the host system. A PCIe root complex (316) in the host system is configured to detect and extract the transaction-specific attributes from the TLP prefix of the PCIe TLP received from the PCIe endpoint. By communicating the transaction-specific attributes in the TLP prefix of the PCIe TLP, it is possible to improve efficiency and performance of the PCIe system without violating the existing PCIe standard.
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公开(公告)号:AU2017238514A1
公开(公告)日:2018-08-30
申请号:AU2017238514
申请日:2017-03-23
Applicant: QUALCOMM INC
Inventor: KLACAR NEVEN , KRISHNA MURALI , MAHESHWARI SHAILESH , RANJAN SUYASH , ROSENBERG OFER
Abstract: Link speed control systems for power optimization are disclosed.In one aspect, a communication link adjusts a data transfer speed based on link utilization levels.In a second exemplary aspect, one or more conditions affecting a link speed are weighted and collectively evaluated to determine an efficient or optimal link speed. By adjusting the link speed in this fashion, lower link speeds may be used, and net power savings may be effectuated.
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公开(公告)号:AU2016284002A1
公开(公告)日:2017-11-23
申请号:AU2016284002
申请日:2016-06-17
Applicant: QUALCOMM INC
Inventor: YIFRACH SHAUL YOHAI , GIL AMIT , PANIAN JAMES LIONEL , ROSENBERG OFER
IPC: G06F12/0806 , G06F15/167
Abstract: Coherency driven enhancements to a PCIe transaction layer are disclosed. In an exemplary aspect, a coherency agent is added to a PCIe system to support a relaxed consistency model for use of memory therein. In particular, endpoints can request ownership of portions of the memory to read from and write to the memory. The coherency agent assigns an address range including the requested portions. The requesting endpoint copies the contents of the memory corresponding to the assigned address range into local endpoint memory to perform read and write operations locally. The owning endpoint may provide an updated snapshot of the copied memory contents upon request. At completion of use of the copied memory contents, or upon request from the coherency agent, ownership of the address range reverts back to the root complex, and the endpoint sends the updated contents back to the address range in the system memory element.
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公开(公告)号:CA3015370A1
公开(公告)日:2017-09-28
申请号:CA3015370
申请日:2017-03-23
Applicant: QUALCOMM INC
Inventor: KLACAR NEVEN , KRISHNA MURALI , MAHESHWARI SHAILESH , RANJAN SUYASH , ROSENBERG OFER
Abstract: Link speed control systems for power optimization are disclosed.In one aspect, a communication link adjusts a data transfer speed based on link utilization levels.In a second exemplary aspect, one or more conditions affecting a link speed are weighted and collectively evaluated to determine an efficient or optimal link speed. By adjusting the link speed in this fashion, lower link speeds may be used, and net power savings may be effectuated.
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