公开(公告)号：DE69815087T2

公开(公告)日：2004-04-01

申请号：DE69815087

申请日：1998-03-20

Applicant: QUALCOMM INC

Inventor： STEIN M ,  BAR-DAVID AYAL

IPC: H03M13/09 ,  H03M13/00 ,  H03M13/29 ,  H03M13/39 ,  H03M13/41 ,  H03M13/47 ,  H04L1/00

Abstract: A method and apparatus for decoding a frame of multi-rate encoded digital data which contains redundant information provided to validate the decoding operation. A frame of data is received which contains information bits and cyclic redundancy check (CRC) bits. In accordance with the invention, the received frame is decoded and a check is conducted to determine whether the CRC bits correspond correctly for the decoded information bits. If the decoded frame passes the CRC test process, the decoded fame is provided to the user. However, if the decoded frame does not pass the CRC test, then at least one additional decoding process is performed on the received frame. In the first exemplary embodiment of the present invention, on a failure of the CRC check, the data is decoded using a trellis decoder and the data that yields the next most likely path through the trellis is selected. In a second illustrative embodiment, if the CRC test fails, the trellis decoder then identifies all paths having metrics within a predetermined threshold of a metric associated with the optimal path through the trellis. The CRC test is then performed on the decoded frame with respect to the suboptimal paths (starting with the most likely path). If any of these paths pass the CRC check, the information bits are output by the decoder. If not, an error is declared.

公开(公告)号：DE69732380T2

公开(公告)日：2006-03-30

申请号：DE69732380

申请日：1997-09-11

Applicant: QUALCOMM INC

Inventor： STEIN M

IPC: H03M13/00 ,  H03M13/09 ,  H03M20060101 ,  H03M13/41 ,  H04L20060101 ,  H04L1/00

Abstract: The present invention is a novel and improved method and apparatus for decoding a frame of digital data which contains redundant information provided to validate the decoding operation. In the present invention, a frame of data contains information bits and cyclic redundancy check (CRC) bits. The received frame is decoded and a check is conducted to determine whether the CRC bits correspond correctly for the decoded information bits. If the decoded frame passes the CRC test process, the decoded fame is provided to the user. However, if the decoded frame does not pass the CRC test, then at least one additional decoding process is performed on the received frame. In the first exemplary embodiment of the present invention, if the CRC test is failed, a noise vector of a predetermined set of noise vectors is summed with the received frame and the resultant frame is decoded for a second time. In the second exemplary embodiment of the present invention, when the CRC test fails, a set of the received symbols are replaced with symbol erasure indications.

公开(公告)号：DE69815087D1

公开(公告)日：2003-07-03

申请号：DE69815087

申请日：1998-03-20

Applicant: QUALCOMM INC

Inventor： STEIN M ,  BAR-DAVID AYAL

IPC: H03M13/09 ,  H03M13/00 ,  H03M13/29 ,  H03M13/39 ,  H03M13/41 ,  H03M13/47 ,  H04L1/00

Abstract: A method and apparatus for decoding a frame of multi-rate encoded digital data which contains redundant information provided to validate the decoding operation. A frame of data is received which contains information bits and cyclic redundancy check (CRC) bits. In accordance with the invention, the received frame is decoded and a check is conducted to determine whether the CRC bits correspond correctly for the decoded information bits. If the decoded frame passes the CRC test process, the decoded fame is provided to the user. However, if the decoded frame does not pass the CRC test, then at least one additional decoding process is performed on the received frame. In the first exemplary embodiment of the present invention, on a failure of the CRC check, the data is decoded using a trellis decoder and the data that yields the next most likely path through the trellis is selected. In a second illustrative embodiment, if the CRC test fails, the trellis decoder then identifies all paths having metrics within a predetermined threshold of a metric associated with the optimal path through the trellis. The CRC test is then performed on the decoded frame with respect to the suboptimal paths (starting with the most likely path). If any of these paths pass the CRC check, the information bits are output by the decoder. If not, an error is declared.

公开(公告)号：DE69732380D1

公开(公告)日：2005-03-03

申请号：DE69732380

申请日：1997-09-11

Applicant: QUALCOMM INC

Inventor： STEIN M

IPC: H03M13/09 ,  H03M20060101 ,  H03M13/00 ,  H03M13/41 ,  H04L20060101 ,  H04L1/00

Abstract: The present invention is a novel and improved method and apparatus for decoding a frame of digital data which contains redundant information provided to validate the decoding operation. In the present invention, a frame of data contains information bits and cyclic redundancy check (CRC) bits. The received frame is decoded and a check is conducted to determine whether the CRC bits correspond correctly for the decoded information bits. If the decoded frame passes the CRC test process, the decoded fame is provided to the user. However, if the decoded frame does not pass the CRC test, then at least one additional decoding process is performed on the received frame. In the first exemplary embodiment of the present invention, if the CRC test is failed, a noise vector of a predetermined set of noise vectors is summed with the received frame and the resultant frame is decoded for a second time. In the second exemplary embodiment of the present invention, when the CRC test fails, a set of the received symbols are replaced with symbol erasure indications.

公开(公告)号：DE69925151T2

公开(公告)日：2006-02-16

申请号：DE69925151

申请日：1999-11-04

Applicant: QUALCOMM INC

Inventor： ULMER J ,  STEIN M

IPC: G06F11/10 ,  H03M13/00 ,  H03M13/25 ,  H03M13/41

Abstract: A method and apparatus for normalizing a plurality of state-metric registers in a decoder using a trellis. The method includes determining an approximate minimum of respective state-metric values stored in the plurality of state-metric registers, and subtracting the approximate minimum from the values. Determining the approximate minimum preferably includes determining the minimum of a predetermined number of most significant bits in the plurality of state-metric registers.

公开(公告)号：DE69925151D1

公开(公告)日：2005-06-09

申请号：DE69925151

申请日：1999-11-04

Applicant: QUALCOMM INC

Inventor： ULMER J ,  STEIN M

IPC: G06F11/10 ,  H03M13/25 ,  H03M13/41 ,  H03M13/00

Abstract: A method and apparatus for normalizing a plurality of state-metric registers in a decoder using a trellis. The method includes determining an approximate minimum of respective state-metric values stored in the plurality of state-metric registers, and subtracting the approximate minimum from the values. Determining the approximate minimum preferably includes determining the minimum of a predetermined number of most significant bits in the plurality of state-metric registers.