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公开(公告)号：AU7096600A
公开(公告)日：2001-03-26
申请号：AU7096600
申请日：2000-08-30
Applicant: QUALCOMM INC
Inventor： VEROLI MAURIZIO DI , BAR-DAVID AYAL
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公开(公告)号：AU7472600A
公开(公告)日：2001-03-26
申请号：AU7472600
申请日：2000-08-30
Applicant: QUALCOMM INC
Inventor： BAR-DAVID AYAL , VEROLI MAURIZIO DI , LEV IDO
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公开(公告)号：WO0117128A3
公开(公告)日：2001-09-07
申请号：PCT/US0023951
申请日：2000-08-30
Applicant: QUALCOMM INC
Inventor： VEROLI MAURIZIO DI , BAR-DAVID AYAL
CPC classification number: H04L7/0029 , H04B7/2125 , H04L7/0041
Abstract: A method for generating a variable delay of a signal (28), including: providing a clock (50) indicating a sequence of sample times at regular intervals and receiving a sequence of input samples (41) representing input values of the signal at respective sample times indicated by the clock. The method further includes determining the delay (40, 46) with a temporal resolution substantially finer than the clock interval to be applied to the signal at each of the respective sample times. For each of the sample times, responsive to the respectively-determined delay, one or more of the input samples are processed so as to generate a corresponding output sample (43) representing a delayed output value of the signal at the sample time.
Abstract translation: 一种用于产生信号（28）的可变延迟的方法，包括：以规则间隔提供指示采样时间序列的时钟（50），并且接收表示在相应采样处的信号输入值的输入采样序列（41） 时钟指示的时间。 该方法进一步包括以时间分辨率确定延迟（40,46），该时间分辨率比在各个采样时间中的每个采样时间对信号施加的时钟间隔要精确得多。 对于每个采样时间，响应于分别确定的延迟，对一个或多个输入采样进行处理，以便生成表示采样时间处信号的延迟输出值的对应输出采样（43）。
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