公开(公告)号：WO2014137783A2

公开(公告)日：2014-09-12

申请号：PCT/US2014019282

申请日：2014-02-28

Applicant: QUALCOMM INC

Inventor： ZHOU HAO ,  ZHANG NING

IPC: H03F1/32

CPC classification number: H04B1/0475 ,  H03F1/3241 ,  H03F1/3247 ,  H03F1/3258 ,  H03F1/3294 ,  H04B2001/0425

Abstract: A power amplifier system including a composite digital predistorter (DPD) ensuring optimized linearity for the power amplifier is described. In this system, a digital-to-analog converter (DAC), an analog filter, a first mixer, and the power amplifier are serially coupled to the composite DPD. A second mixer, a receive gain block, and an analog-to-digital converter (ADC) are serially coupled to the output of the power amplifier. A DPD training component is coupled between the inputs of the composite DPD and the ADC. The composite DPD includes a memory-based DPD, e.g., a memory polynomial (MP) DPD, a memoryless-linearizing DPD, e.g., a look-up table (LUT) DPD, and two multiplexers.

Abstract translation: 描述了一种包括确保功率放大器的优化线性度的复合数字预失真器（DPD）的功率放大器系统。 在该系统中，数模转换器（DAC），模拟滤波器，第一混频器和功率放大器串联耦合到复合DPD。 第二混频器，接收增益模块和模数转换器（ADC）串联耦合到功率放大器的输出端。 DPD训练组件耦合在复合DPD和ADC的输入之间。 复合DPD包括基于存储器的DPD，例如存储器多项式（MP）DPD，无记忆线性化DPD，例如查找表（LUT）DPD和两个多路复用器。