公开(公告)号：WO2018022276A1

公开(公告)日：2018-02-01

申请号：PCT/US2017/041108

申请日：2017-07-07

Applicant: QUALCOMM INCORPORATED

Inventor： ZHANG, Zhiqing ,  YUNG, Chi Fan ,  DUNCAN, Joseph ,  HUA, Jun ,  SHI, Song ,  MARRA, Thomas

IPC: H03F1/02 ,  H03F3/195 ,  H03F3/213

Abstract: Certain aspects of the present disclosure provide methods and apparatus for generating an envelope tracking power supply voltage. For example, certain aspects of the present disclosure provide an envelope tracking power supply having a linear amplifier having an output coupled to a power supply node of an amplifier, wherein a power supply node of the linear amplifier is coupled to a first voltage supply node. The envelope tracking power supply may also include a switch mode power supply having an output coupled to the power supply node of the amplifier. Certain aspects also include a circuit having a first switch coupled to the first voltage supply node and a second switch coupled to a second voltage supply node, wherein a power supply node of the switch mode power supply is coupled to the first switch and the second switch.

Abstract translation: 本公开的某些方面提供了用于生成包络跟踪电源电压的方法和设备。 例如，本公开的某些方面提供了一种包络跟踪电源，其具有线性放大器，该线性放大器具有耦合到放大器的电源节点的输出，其中线性放大器的电源节点耦合到第一电压供应节点。 包络跟踪电源还可以包括具有耦合到放大器的电源节点的输出的开关模式电源。 某些方面还包括具有耦合到第一电压供应节点的第一开关和耦合到第二电压供应节点的第二开关的电路，其中开关模式电源的电源节点耦合到第一开关并且第二开关

公开(公告)号：WO2016144573A1

公开(公告)日：2016-09-15

申请号：PCT/US2016/019840

申请日：2016-02-26

Applicant: QUALCOMM INCORPORATED

Inventor： HUA, Jun ,  MIREA, Iulian

IPC: G05F1/575

CPC classification number: G05F1/445 ,  G05F1/46 ,  G05F1/56 ,  G05F1/575 ,  G05F3/262

Abstract: Disclosed is circuitry having an input stage and an output stage. A first compensation network may be connected to the input and output stages, and configured to split a pole at the input stage and a pole at the output stage. A second compensation network may be connected to the input and output stage. The second compensation network may be configured to suppress peaking of a gain of the circuit at frequencies near the pole at the output stage.

Abstract translation: 公开了具有输入级和输出级的电路。 第一补偿网络可以连接到输入和输出级，并且被配置为在输入级分割极点和在输出级分割极点。 第二补偿网络可以连接到输入和输出级。 第二补偿网络可以被配置为抑制在输出级处的极附近的频率处的电路的增益的峰值。

公开(公告)号：EP3491737A1

公开(公告)日：2019-06-05

申请号：EP17740866.3

申请日：2017-07-07

Applicant: Qualcomm Incorporated

Inventor： ZHANG, Zhiqing ,  YUNG, Chi Fan ,  DUNCAN, Joseph ,  HUA, Jun ,  SHI, Song ,  MARRA, Thomas

IPC: H03F1/02 ,  H03F3/195 ,  H03F3/213