公开(公告)号：SG10201903205RA

公开(公告)日：2019-11-28

申请号：SG10201903205R

申请日：2019-04-10

Applicant: SAMSUNG ELECTRONICS CO LTD

Inventor： SUNYOUNG LEE ,  MINJAE KANG ,  SE-YEON KIM ,  TEAWON KIM ,  YONG-SUK TAK ,  SUNJUNG KIM

Abstract: A method of forming a low-k layer includes forming a layer by providing a silicon source, a carbon source, an oxygen source, and a nitrogen source onto a substrate. The forming of the layer includes a plurality of main cycles, and each of the main cycles includes providing the silicon source, providing the carbon source, providing the oxygen source, and providing the nitrogen source, each of which is performed at least one time. Each of the main cycles includes sub-cycles in which the providing of the carbon source and the providing of the oxygen source are alternately performed. FIG. 1

公开(公告)号：US20240234543A1

公开(公告)日：2024-07-11

申请号：US18390018

申请日：2023-12-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： HYUN-KWAN YU ,  SUNYOUNG LEE ,  Hyunwoo PARK

IPC: H01L29/66 ,  H01L29/08 ,  H01L29/49

CPC classification number: H01L29/66553 ,  H01L29/0847 ,  H01L29/4991

Abstract: A semiconductor device comprises a substrate including an active pattern, a channel pattern on the active pattern, a source/drain pattern on the channel pattern, a gate electrode on the channel pattern, and a gate dielectric layer between the channel pattern and the gate electrode. The gate electrode includes an inner electrode between neighboring first and second semiconductor patterns. The gate dielectric layer includes a high-k dielectric layer that surrounds the inner electrode of the gate electrode and an inner spacer on the high-k dielectric layer. The inner spacer includes a first horizontal part between the high-k dielectric layer and the second semiconductor pattern, a first vertical part between the high-k dielectric layer and the source/drain pattern, and a first corner part that connects the first horizontal part to the first vertical part.