公开(公告)号：SG10201905607UA

公开(公告)日：2020-02-27

申请号：SG10201905607U

申请日：2019-06-18

Applicant: SAMSUNG ELECTRONICS CO LTD

Inventor： MIN-HEE CHOI ,  SEOKHOON KIM ,  CHOEUN LEE ,  EDWARDNAMGYU CHO ,  SEUNG HUN LEE

Abstract: A semiconductor device including a substrate including an active pattern; a gate electrode crossing the active pattern; a source/drain pattern adjacent to one side of the gate electrode and on an upper portion of the active pattern; an active contact electrically connected to the source/drain pattern; and a silicide layer between the source/drain pattern and the active contact, the source/drain pattern including a body part including a plurality of semiconductor patterns; and a capping pattern on the body part, the body part has a first facet, a second facet on the first facet, and a corner edge defined where the first facet meets the second facet, the corner edge extending parallel to the substrate, the capping pattern covers the second facet of the body part and exposes the corner edge, and the silicide layer covers a top surface of the body part and a top surface of the capping pattern.

公开(公告)号：US20230017277A1

公开(公告)日：2023-01-19

申请号：US17935561

申请日：2022-09-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JINBUM KIM ,  SEOKHOON KIM ,  KWANHEUM LEE ,  CHOEUN LEE ,  SUJIN JUNG

IPC: H01L29/08 ,  H01L29/78 ,  H01L29/167 ,  H01L29/786 ,  H01L29/06

Abstract: A semiconductor device includes a channel, a first source/drain structure on a first side surface of the channel, a second source/drain structure on a second side surface of the channel, a gate structure surrounding the channel, an inner spacer layer on a side surface of the gate structure, and an outer spacer layer on an outer surface of the inner spacer layer. The first source/drain structure includes a first source/drain layer on the channel and a second source/drain layer on the first source/drain layer, and on a plane of the semiconductor device that passes through the channel, at least one of a first boundary line of the first source/drain layer in contact with the second source/drain layer and a second boundary line of the first source/drain layer in contact with the channel may be convex, extending toward the channel.

公开(公告)号：US20230402535A1

公开(公告)日：2023-12-14

申请号：US18081855

申请日：2022-12-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYUNGHO KIM ,  KI HWAN KIM ,  KANG HUN MOON ,  CHOEUN LEE ,  YONGUK JEON

IPC: H01L29/775 ,  H01L29/423 ,  H01L29/06 ,  H01L29/417

CPC classification number: H01L29/775 ,  H01L29/42392 ,  H01L29/0673 ,  H01L29/41775

Abstract: A semiconductor device includes; a substrate including an active pattern, a channel pattern on the active pattern, the channel pattern including a plurality of spaced apart and vertically stacked semiconductor patterns, a source/drain pattern connected to the plurality of semiconductor patterns, a gate electrode on the plurality of semiconductor patterns, the gate electrode including a portion interposed between adjacent ones of the plurality of semiconductor patterns, and an inner spacer interposed between the portion of the gate electrode and the source/drain pattern, wherein the inner spacer is crystalline metal oxide is expressed by a formula (MO), wherein (O) is an oxygen atom, and (M) is a metal atom selected from a group consisting of Mg, Be, and Ga.

公开(公告)号：US20230387205A1

公开(公告)日：2023-11-30

申请号：US18100233

申请日：2023-01-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki Hwan KIM ,  KYUNGHO KIM ,  KANG HUN MOON ,  CHOEUN LEE ,  Yonguk JEON

IPC: H01L29/08 ,  H01L29/66

CPC classification number: H01L29/0847 ,  H01L29/6656

Abstract: A semiconductor device includes a substrate including an active pattern; a source/drain pattern on the active pattern; a gate electrode on the active pattern; and a gate spacer on the source/drain pattern. The source/drain pattern includes a first semiconductor layer on the active pattern and a second semiconductor layer on the first semiconductor layer. The first semiconductor layer includes a first inner sidewall and second inner sidewall on the second semiconductor layer. A distance between the first and second inner sidewalls of the first semiconductor layer decreases according as positions of two portions of the first semiconductor layer where the distance is measured become closer to the gate spacer decreases.

公开(公告)号：US20170271479A1

公开(公告)日：2017-09-21

申请号：US15612338

申请日：2017-06-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JINBUM KIM ,  JAEYOUNG PARK ,  DONGHUN LEE ,  JEONGHO YOO ,  JIEON YOON ,  KWAN HEUM LEE ,  CHOEUN LEE ,  BONYOUNG KOO

IPC: H01L29/66 ,  H01L29/12 ,  H01L29/417 ,  H01L29/423 ,  H01L29/40 ,  H01L21/30 ,  H01L29/78 ,  H01L29/08 ,  H01L29/04 ,  H01L29/165

CPC classification number: H01L29/66636 ,  H01L21/3003 ,  H01L29/045 ,  H01L29/0847 ,  H01L29/12 ,  H01L29/165 ,  H01L29/401 ,  H01L29/41766 ,  H01L29/42356 ,  H01L29/66545 ,  H01L29/78

Abstract: A method of fabricating a semiconductor device is provided as follows. A source/drain pattern is formed on a substrate. The source/drain pattern contains silicon atoms and germanium atoms. At least one germanium atom is removed from the germanium atoms of the source/drain pattern.