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公开(公告)号:DE69014842D1
公开(公告)日:1995-01-19
申请号:DE69014842
申请日:1990-12-13
Applicant: SEIKO EPSON CORP
Inventor: MATSUEDA YOJIRO
IPC: G02F1/136 , G02F1/133 , G02F1/1362 , G02F1/1368 , G09G3/36 , H04N3/12
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公开(公告)号:DE69926972D1
公开(公告)日:2005-10-06
申请号:DE69926972
申请日:1999-03-17
Applicant: SEIKO EPSON CORP
Inventor: KIMURA MUTSUMI , MATSUEDA YOJIRO , OZAWA TOKUROH , QUINN MICHAEL
IPC: G02F1/136 , G02F1/1368 , G09G3/00 , G09G3/20 , G09G3/30 , G09G3/32 , G09G3/36 , H01L21/768 , H01L29/786
Abstract: A transistor circuit (100) including a driving transistor (110) where conductance between a source and a drain is controlled in response to voltage, and a compensating transistor (120) where a gate is connected to one of a source and a drain and wherein the compensating transistor is connected so as to supply input signals to the gate of the driving transistor through the source and drain. In a transistor circuit where conductance control in a driving transistor is carried out in response to the voltage of input signals, it is possible to control the conductance by using input signals of a relatively low voltage and a variance in threshold characteristics of driving transistors is compensated. With this transistor circuit, a display panel that can display picture images with reduced uneven brightness is achieved.
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公开(公告)号:DE69431636D1
公开(公告)日:2002-12-05
申请号:DE69431636
申请日:1994-07-26
Applicant: SEIKO EPSON CORP
Inventor: MIYASAKA MITSUTOSHI , MATSUEDA YOJIRO , TAKENAKA SATOSHI
IPC: G02F1/1362 , G09G3/20 , G09G3/36 , H01L21/205 , H01L21/336 , H01L29/786 , G02F1/136
Abstract: An objective of the present invention is to provide a high-performance thin-film semiconductor device and a simple fabrication method therefor. After a silicon film is deposited at 580 DEG C or less and at a deposition rate of 6 ANGSTROM /minute or more, thermal oxidation is performed. This ensures an easy and simple fabrication of a high-performance thin-film semiconductor device. A further objective of the present invention is to implement a thin-film semiconductor device capable of low-voltage, high-speed drive. The short-channel type of TFT circuit with an LDD structure can reduce a voltage, increase speed and restrain the power consumption, enabling a higher breakdown voltage. Speeds can be further accelerated by optimizing the maximum impurity concentration of an LDD portion, that of source and drain portions, the LDD length, and the channel length. A display device or display system using these TFTs can be configured such that drive signals are at or below the TTL level.
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公开(公告)号:DE69415181D1
公开(公告)日:1999-01-28
申请号:DE69415181
申请日:1994-01-12
Applicant: SEIKO EPSON CORP
Inventor: WAKAI YOICHI , NIWA KENJI , KONISHI MASANORI , MATSUEDA YOJIRO , MIKOSHIBA HIROAKI
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公开(公告)号:DE68915413T2
公开(公告)日:1994-11-17
申请号:DE68915413
申请日:1989-12-11
Applicant: SEIKO EPSON CORP
Inventor: MATSUEDA YOJIRO
IPC: G02F1/136 , G02F1/1362 , G02F1/1368 , H01L21/82 , H01L27/12 , H01L29/78 , H01L29/786
Abstract: An active matrix type display device has a plurality of scanning lines (Y1, ... Yn), a plurality of signal lines (X1, ... Xm), and pixels (10, 30, 40, 50, 60) disposed at inter-sections of the scanning lines and the signal lines for providing a display. Each pixel is driven by way of a respective plurality of thin film transistors (1, 2, 23, 24, 31, 32, 33, 41, 42, 51, 52) which are connected to an associated pixel electrode (P). Each pixel electrode also has connected thereto a respective plurality of storage capacitors (5, 6, 25, 26, 27, 37, 38, 45, 46, 47, 55, 56, 57) arranged in parallel. Thus, if a thin film transistor or a storage capacitor connected to one of the pixel electrodes is defective, the defect in the associated pixel can be relieved simply by disconnecting as a pair both one of the thin film transistors and at least one of the storage capacitors so long as the pair includes the defective element.
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公开(公告)号:DE60045789D1
公开(公告)日:2011-05-12
申请号:DE60045789
申请日:2000-10-16
Applicant: SEIKO EPSON CORP
Inventor: MATSUEDA YOJIRO
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公开(公告)号:DE69838277D1
公开(公告)日:2007-10-04
申请号:DE69838277
申请日:1998-04-16
Applicant: SEIKO EPSON CORP
Inventor: MATSUEDA YOJIRO , OZAWA TOKUROH
Abstract: A driving circuit of an electro-optical device such as a liquid crystal device is compatible with digital image signals and implements a DA converting function and a gamma correcting function by a relatively simple and small-scale circuit configuration. The driving circuit of the liquid crystal device is provided with a DAC 3 for issuing a voltage signal Vc corresponding to an N bits of digital image data DA that indicate gray scale to a signal line of the liquid crystal device. Depending on whether the value of a most significant bit is "0" or "1," the DAC 3 brings the output driving voltage characteristics close to the optical characteristics of the liquid crystal device according to a pair of first or second reference voltage so as to make a gamma correction.
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公开(公告)号:DE69415181T2
公开(公告)日:1999-06-24
申请号:DE69415181
申请日:1994-01-12
Applicant: SEIKO EPSON CORP
Inventor: WAKAI YOICHI , NIWA KENJI , KONISHI MASANORI , MATSUEDA YOJIRO , MIKOSHIBA HIROAKI
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公开(公告)号:DE60230882D1
公开(公告)日:2009-03-05
申请号:DE60230882
申请日:2002-09-13
Applicant: SEIKO EPSON CORP
Inventor: MATSUEDA YOJIRO
IPC: G09F9/30 , G02F1/1345 , H01L27/32
Abstract: An organic electroluminescent display device includes: a substrate (64); a plurality of operating elements (50) provided in an operating region (54) of the substrate; a first wiring pattern (10) which is provided outside the operating region (54) in the substrate so that the first wiring pattern (10) is longer than one side of the operating region; a first electrode (72) formed in a layer different from the first wiring pattern (10), partially overlapping the first wiring pattern, and supplying electrical current to the operating elements; and a conductive section (70) provided in a region in which the first wiring pattern partially overlaps the first electrode, electrically connecting the first wiring pattern (10) to the first electrode (72), thereby reducing the resistance between the first wiring pattern (10) and the first electrode (72) to the flow of current.
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公开(公告)号:DE69926972T2
公开(公告)日:2006-03-09
申请号:DE69926972
申请日:1999-03-17
Applicant: SEIKO EPSON CORP
Inventor: KIMURA MUTSUMI , MATSUEDA YOJIRO , OZAWA TOKUROH , QUINN MICHAEL
IPC: G02F1/136 , G02F1/1368 , G09G3/00 , G09G3/20 , G09G3/30 , G09G3/32 , G09G3/36 , H01L21/768 , H01L29/786
Abstract: A transistor circuit (100) including a driving transistor (110) where conductance between a source and a drain is controlled in response to voltage, and a compensating transistor (120) where a gate is connected to one of a source and a drain and wherein the compensating transistor is connected so as to supply input signals to the gate of the driving transistor through the source and drain. In a transistor circuit where conductance control in a driving transistor is carried out in response to the voltage of input signals, it is possible to control the conductance by using input signals of a relatively low voltage and a variance in threshold characteristics of driving transistors is compensated. With this transistor circuit, a display panel that can display picture images with reduced uneven brightness is achieved.
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