-
公开(公告)号:US11778343B2
公开(公告)日:2023-10-03
申请号:US17456982
申请日:2021-11-30
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Dajiang Yang , Sergey Velichko , Bartosz Piotr Banachowicz , Tomas Geurts , Muhammad Maksudur Rahman
IPC: H04N25/58 , H04N25/63 , H01L27/146
CPC classification number: H04N25/58 , H01L27/1464 , H01L27/14627 , H01L27/14656 , H04N25/63
Abstract: An image sensor may include an array of image sensor pixels. Each pixel in the array may be a global shutter pixel having a first charge storage node configured to capture scenery information and a second charge storage node configured to capture background information generated as a result of parasitic light and dark noise signals. The first and/or second charge storage nodes may each be provided with an overflow charge storage to provide high dynamic range (HDR) functionality. The background information may be subtracted from the scenery information to cancel out the desired background signal contribution and to obtain an HDR signal with high global shutter efficiency. The charge storage nodes may be implemented as storage diode or storage gate devices. The pixels may be backside illuminated pixels with optical diffracting structures and multiple microlenses formed at the backside to distribute light equally between the two charge storage nodes.
-
公开(公告)号:US20210337149A1
公开(公告)日:2021-10-28
申请号:US17247522
申请日:2020-12-15
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Erez Tadmor , Tomas Geurts
IPC: H04N5/378 , H04N5/3745
Abstract: A time-of-flight (TOF) sensing system may include an illumination module and a sensor module. The sensor module may include an array of sensor pixels, pixel-level readout circuitry, and column-level readout circuitry coupled to the pixel-level readout circuitry via corresponding column lines. Pixel-level readout circuitry may be provided on a per-pixel basis (e.g., dedicated or unshared per-pixel readout circuitry may be provided for each pixel). Pixel-level readout circuitry may include one or more correlated double sampling stages and a storage stage. The storage stage may include a set of capacitors each configured to store different phase data generated by a corresponding pixel for a TOF sensing operation.
-
公开(公告)号:US10958861B2
公开(公告)日:2021-03-23
申请号:US16661209
申请日:2019-10-23
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Tomas Geurts
IPC: H04N5/374 , H04N5/3745 , H04N5/353 , H04N5/378
Abstract: An image sensor may include an imaging pixel, readout circuitry, and amplification circuitry coupled between the imaging pixel and the readout circuitry. Correlated double sampling may be used to sample a reset voltage and a signal voltage from the imaging pixel. The difference between the reset voltage and the signal voltage may reflect the amount of light received by the imaging pixel during an integration time. The amplification circuitry may amplify the difference between the reset voltage and the signal voltage. The amplification circuitry may include a source follower transistor coupled between first and second capacitors, with the second capacitor having a greater capacitance than the first capacitor. The amplification circuitry may be formed only from n-type metal-oxide-semiconductor transistors. The amplification circuitry may consume power dynamically as opposed to consuming static power for minimal power consumption requirements.
-
公开(公告)号:US10531027B2
公开(公告)日:2020-01-07
申请号:US16166442
申请日:2018-10-22
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Tomas Geurts
IPC: H04N3/14 , H04N5/363 , H04N5/3745
Abstract: An image sensor may include an array of pixels arranged in rows and columns. The array of pixels may operate in a global shutter mode. Each pixel in the array of pixels may have a floating diffusion node for storing charge and may include an active reset circuit that acts as an inverting amplifier and that resets the floating diffusion node to a predetermined reference voltage, which eliminates the need for correlated double sampling readout. A sampling circuit may be coupled to the active reset circuit. The sampling circuit may sample and store signals that correspond to the amount of charge stored at the floating diffusion node. The sampling circuit may pass stored signals to a column sensing line through an amplifier. The amplifier may include a source follower transistor that provides proportional amplification to the stored signals and may include an active reset circuit for resetting the sampling circuit.
-
公开(公告)号:US10250834B2
公开(公告)日:2019-04-02
申请号:US15258077
申请日:2016-09-07
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Tomas Geurts , Joris De Bondt
Abstract: Methods and device for a readout circuit according to various aspects of the present invention may operate in conjunction with a storage device selectively coupled to an input signal having a voltage value within a first voltage range. A comparator may compare the voltage value of the input signal to a predetermined threshold voltage. A level-shifting circuit may shift the first voltage value of the input signal to a second voltage value within a second voltage range if the first voltage value of the input signal is greater than the predetermined threshold voltage.
-
公开(公告)号:US11818478B2
公开(公告)日:2023-11-14
申请号:US17657489
申请日:2022-03-31
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Manuel H. Innocent , Robert Michael Guidash , Tomas Geurts
IPC: H04N25/621 , H04N25/75
CPC classification number: H04N25/623 , H04N25/75
Abstract: An image sensor may include an array of image pixels. The array of image pixel may be coupled to control circuitry and readout circuitry. One or more image pixels in the array may each include a coupled-gates structure coupling a photodiode at one input terminal to a capacitor at a first output terminal and to a floating diffusion region at a second output terminal. The coupled-gates structure may include a first transistor that sets a potential barrier defining overflow portions of the photodiode-generated charge. Second and third transistors in the coupled-gates structure may be modulated to transfer the overflow charge to the capacitor and to the floating diffusion region at suitable times. The second and third transistors may form a conductive path between the capacitor and the floating diffusion region for a low conversion gain mode of operation.
-
公开(公告)号:US10904467B2
公开(公告)日:2021-01-26
申请号:US16729688
申请日:2019-12-30
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Tomas Geurts
IPC: H04N5/359 , H04N5/378 , H04N5/357 , H04N5/355 , H01L27/146 , H04N5/3745
Abstract: An image sensor pixel may include a photodiode that generates first charge for a first frame and second charge for a second frame, first and second storage gates coupled to the photodiode, a floating diffusion coupled to the first storage gate through a first transistor, a second transistor coupled to the second storage gate, and a capacitor coupled to the floating diffusion through a third transistor. The image sensor pixel may output image signals associated with the first charge generated by the photodiode for the first image frame while the photodiode concurrently generates the second charge for the second image frame. The second storage gate may be used to store overflow charge. Overflow charge for the second frame may be stored at the second storage gate while image signals associated with the first image frame are read out from capacitor and the floating diffusion.
-
公开(公告)号:US10692179B2
公开(公告)日:2020-06-23
申请号:US15815949
申请日:2017-11-17
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Manuel H. Innocent , Tomas Geurts
Abstract: Various embodiments of the present technology provide a method and apparatus for signal distribution in an image sensor. In various embodiments, the apparatus provides a balanced signal distribution circuit having a plurality of driver circuits, wherein each driver circuit is connected to a logic circuit, distributed either directly below the pixel array or interspersed within the pixel array. A clock distribution network is connected to the logic circuit to provide all the logic circuits with a clock signal substantially simultaneously, which, in turn, controls all of the driver circuits substantially simultaneously and all pixels in the pixel array receive a control signal substantially simultaneously.
-
公开(公告)号:US10560649B2
公开(公告)日:2020-02-11
申请号:US15900136
申请日:2018-02-20
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Tomas Geurts
IPC: H04N5/359 , H04N5/378 , H04N5/357 , H04N5/355 , H01L27/146
Abstract: An image sensor pixel may include a photodiode that generates first charge for a first frame and second charge for a second frame, first and second storage gates coupled to the photodiode, a floating diffusion coupled to the first storage gate through a first transistor, a second transistor coupled to the second storage gate, and a capacitor coupled to the floating diffusion through a third transistor. The image sensor pixel may output image signals associated with the first charge generated by the photodiode for the first image frame while the photodiode concurrently generates the second charge for the second image frame. The second storage gate may be used to store overflow charge. Overflow charge for the second frame may be stored at the second storage gate while image signals associated with the first image frame are read out from capacitor and the floating diffusion.
-
公开(公告)号:US10484624B2
公开(公告)日:2019-11-19
申请号:US15644957
申请日:2017-07-10
Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Inventor: Tomas Geurts
Abstract: Image sensors may include pixel circuitry to enable per-pixel integration time and read-out control. Two transistors may be coupled in series for per-pixel control, with one of the transistors being controlled on a row-by-row basis and the other transistor being controlled on a column-by-column basis. The two transistors in series may be coupled directly to each other without any intervening structures. Two transistors in series between a photodiode and a power supply terminal enables per-pixel control of starting an integration time, two transistors in series between a photodiode and a charge storage region enables per-pixel control of ending an integration time, and two transistors in series between a charge storage region and a floating diffusion region enables per-pixel control of read-out.
-
-
-
-
-
-
-
-
-