Abstract:
An SQTV processor for converting a video signal received at an interlaced scanning frequency of 50 or 60 Hz, respectively to an interlaced scanning frequency of 100 or 120 Hz and implementing algorithms of noise filtering and of edge definition, including an analog-digital converter (ADC) of analog input signals of luminance and chrominance, at least a field memory (FIELD MEMORY_1) or more preferably two similar field memories where digital blocks of luminance (Y) value and blocks of values of each one of the two chrominance (U, V) components of said converted video signals are stored, one "First-In-First-Out" (LINE MEMORY) register for digital values read from said filed memory containing the pixels of a whole line of each field, a noise filtering block (NOISE REDUCTION), a sampling frequency converter (SRC) of said fields from 50 or 60 Hz to 100 or 120 Hz, means of conversion of the vertical format (VFC), means of edge definition (PE) enhancement and means of digital-to-analog conversion (DAC) of the processed luminance and chrominance (YUV) signals, is further equipped with means for compressing and coding said converted video signals according to an adaptive differential pulse code modulation (ADPCM) scheme of said digital values to be stored in said field memory (FIELD MEMORY_1) and means of ADPCM decoding and decompressing of data read from said field memory (FIELD MEMORY_1). The significative reduction of the total memory requisite produced by the ADPCM pre-compression would make the entire system more readily integratable on a single chip.
Abstract:
The video RAM requisite of an MPEG-2 decoder is reduced by recompressing according to an adaptive pulse code modulation scheme (ADPCM) at least the I and P pictures, after MPEG-2 decompression and before storing the relative data in the video RAM. The ADPCM recompressed and coded data written in the video RAM are decoded and decompressed during the reconstruction of a B-picture to be displayed.
Abstract:
The RAM requisite for temporarily storing a stream of digital data blocks in a coding/decoding system of information transferable by blocks may be significantly reduced by compressing and coding the data by blocks through a tree search vector quantization (TSVQ), storing TSVQ compressed and coded data in the RAM and decoding and decompressing during the subsequent reading of the data stored in the RAM thus reconstituting the stream of digital data blocks.
Abstract:
The video memory requisite of an MPEG-2 decoder commonly comprising a stage of decompression of the respective I, P and B-pictures of the MPEG compression algorithm before writing the data in respective buffers organized in the video memory and in which the decompression of a B-picture implies the use of forward and backward motion compensation predictors is reduced by:
decompressing by macroblocks a B-picture while maintaining the relative backward predictor, stored in said memory, in a compressed form and decompressing macroblocks of a compressed P-picture using the respective forward predictor values; defining through said decompressed P-macroblocks the region of the stored compressed backward predictor containing the backward predictor value of the macroblock of the B-picture undergoing decompression; and extracting from said region the respective backward predictor value for the B-macroblock undergoing decompression, and completing the motion compensation routine according to the MPEG standard.
Abstract:
The video memory requisite of an MPEG decoder effecting a decompression of the I, P and optionally also of the B picture according to the MPEG compression algorithm and requiring the storing in respective buffers organized in said video memory of the respective MPEG- decompressed data, may be dynamically reduced by subsampling and recompressing according to a ADPCM algorithm at least the data pertaining to the I and P pictures before coding and storing them in the respective buffers. Subsequently, the stored data are decoded, decompressed and upsampled for reconstructing blocks of pels to be sent to a macroblock-to-raster scan conversion circuit.
Abstract:
Resynchronized windowed clock signals are constructed starting from a main clock signal of the same frequency of that of the active phases of the constructed windowed clock signal, advantageously without requiring a main clock of a higher frequency.