公开(公告)号：WO2014051511A3

公开(公告)日：2014-04-03

申请号：PCT/SE2013/051124

申请日：2013-09-27

Applicant: SILEX MICROSYSTEMS AB

Inventor： EBEFORS, Thorbjörn ,  KNUTSSON, Henrik

IPC: H01L21/768 ,  H01L23/48 ,  H01L23/52

Abstract: The invention relates to methods of making a substrate-through metal via having a high aspect ratio, in a semiconductor substrate, and a metal pattern on the substrate surface. It comprises providing a semiconductor substrate (wafer) and depositing poly-silicon on the substrate. The the poly-silicon on the substrate surface is patterned by etching away unwanted portions. Then, Ni is selectiveley deposited on the poly-silicon by an electroless process. A via hole is made through the substrate, wherein the walls in the hole is subjected to the same processing as above. Cu is deposited Cu on the Ni by a plating process. Line widths and spacings

公开(公告)号：EP2901475B1

公开(公告)日：2020-02-26

申请号：EP13841291.1

申请日：2013-09-27

Applicant: Silex Microsystems AB

Inventor： EBEFORS, Thorbjörn ,  KNUTSSON, Henrik

IPC: H01L21/48 ,  H01L21/768 ,  H01L23/48 ,  H01L23/498 ,  H01L21/288

公开(公告)号：EP2901475A2

公开(公告)日：2015-08-05

申请号：EP13841291.1

申请日：2013-09-27

Applicant: Silex Microsystems AB

Inventor： EBEFORS, Thorbjörn ,  KNUTSSON, Henrik

IPC: H01L21/768 ,  H01L23/48 ,  H01L23/52

Abstract: A method of making a substrate-through metal via having a high aspect ratio, in a semiconductor substrate, and a metal pattern on the substrate surface, includes providing a semiconductor substrate (wafer) and depositing poly-silicon on the substrate. The poly-silicon on the substrate surface is patterned by etching away unwanted portions. Then, Ni is selectively deposited on the poly-silicon by an electroless process. A via hole is made through the substrate, wherein the walls in the hole is subjected to the same processing as above. Cu is deposited on the Ni by a plating process. Line widths and spacings