公开(公告)号：SE2351074A1

公开(公告)日：2025-03-15

申请号：SE2351074

申请日：2023-09-14

Applicant: SILEX MICROSYSTEMS AB

Inventor： SANDIN ANDREAS ,  HELD LUCAS ,  SVEDIN NIKLAS

IPC: H01L21/3065 ,  H01L21/768 ,  H01L23/48

Abstract: The present invention relates to a semiconductor device ( 100) that prevents sidewall profile damages during etch, preferably a deep reactive ion etching, of a through silicon via, TSV, ( 150) through a Si layer (110) of a stack in the semiconductor device (100). This is achieved by, in a via-last process, using a first conductive material (130, 130’, 130”) embedded in an insulating layer (120) of the stack as an etch stop. The even TSV sidewall profile thus obtained simplifies subsequent metallization of the TSV using physical vapor deposition, PVD. The present invention further includes a method of manufacturing such a semiconductor device (100). The improved, more reliable, metallization obtained using the inventive semiconductor device (100) leads to improved conductivity of the TSV (150), as well as a less costly and complex manufacturing process with improved yield.