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    VERTICAL INTEGRATION OF CMOS ELECTRONICS WITH PHOTONIC DEVICES
    1.
    发明申请
    VERTICAL INTEGRATION OF CMOS ELECTRONICS WITH PHOTONIC DEVICES 审中-公开
    CMOS电子与光电器件的垂直集成

    公开(公告)号：WO2013109955A1

    公开(公告)日：2013-07-25

    申请号：PCT/US2013/022244

    申请日：2013-01-18

    Applicant: SKORPIOS TECHNOLOGIES, INC.

    Inventor： DALLESASSE, John ,  KRASULICK, Stephen B. ,  CREAZZO, Timothy ,  MARCHENA, Elton

    IPC: H01L27/14 ,  H01L27/12

    CPC classification number: H01L27/14689 ,  H01L21/76254 ,  H01L21/8221 ,  H01L21/8258 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/12 ,  H01L27/14625 ,  H01L27/14634 ,  H01L27/14643 ,  H01L27/14687 ,  H01L27/15

    Abstract: A method of fabricating a composite semiconductor structure includes providing an SOI substrate including a plurality of silicon-based devices, providing a compound semiconductor substrate including a plurality of photonic devices, and dicing the compound semiconductor substrate to provide a plurality of photonic dies. Each die includes one or more of the plurality of photonics devices. The method also includes providing an assembly substrate having a base layer and a device layer including a plurality of CMOS devices, mounting the plurality of photonic dies on predetermined portions of the assembly substrate, and aligning the SOI substrate and the assembly substrate. The method further includes joining the SOI substrate and the assembly substrate to form a composite substrate structure and removing at least the base layer of the assembly substrate from the composite substrate structure.

    Abstract translation: 制造复合半导体结构的方法包括提供包括多个硅基器件的SOI衬底，提供包括多个光子器件的化合物半导体衬底，以及切割化合物半导体衬底以提供多个光子管芯。 每个管芯包括多个光子器件中的一个或多个。 该方法还包括提供具有基底层和包括多个CMOS器件的器件层的组装衬底，将多个光子管芯安装在组装衬底的预定部分上，并且对准SOI衬底和组件衬底。 该方法还包括将SOI衬底和组件衬底接合以形成复合衬底结构，并从复合衬底结构去除组装衬底的至少基底层。

    METHOD AND SYSTEM FOR TEMPLATE ASSISTED WAFER BONDING
    2.
    发明申请
    METHOD AND SYSTEM FOR TEMPLATE ASSISTED WAFER BONDING 审中-公开
    用于模板辅助波形粘结的方法和系统

    公开(公告)号：WO2012078361A1

    公开(公告)日：2012-06-14

    申请号：PCT/US2011/061951

    申请日：2011-11-22

    Applicant: SKORPIOS TECHNOLOGIES, INC. ,  DALLESASSE, John ,  KRASULICK, Stephen, B.

    Inventor： DALLESASSE, John ,  KRASULICK, Stephen, B.

    IPC: B32B27/00 ,  B32B27/32 ,  H01L21/30

    CPC classification number: H01L25/167 ,  H01L21/78 ,  H01L21/822 ,  H01L23/50 ,  H01L24/97 ,  H01L31/1876 ,  H01L33/005 ,  H01L33/48 ,  H01L33/52 ,  H01L2924/1204 ,  H01L2924/12042 ,  H01L2924/14 ,  H01S5/0217 ,  H01S5/026 ,  H01L2924/00

    Abstract: A method of fabricating a composite semiconductor structure includes providing an SOI substrate including a plurality of silicon-based devices and providing a compound semiconductor substrate including a plurality of photonic devices. The method also includes dicing the compound semiconductor substrate to provide a plurality of photonic dies. Each die includes one or more of the plurality of photonics devices. The method further includes providing an assembly substrate, mounting the plurality of photonic dies on predetermined portions of the assembly substrate, aligning the SOI substrate and the assembly substrate, joining the SOI substrate and the assembly substrate to form a composite substrate structure, and removing at least a portion of the assembly substrate from the composite substrate structure.

    Abstract translation: 制造复合半导体结构的方法包括提供包括多个硅基器件的SOI衬底，并提供包括多个光子器件的化合物半导体衬底。 该方法还包括切割化合物半导体衬底以提供多个光子管芯。 每个管芯包括多个光子器件中的一个或多个。 该方法还包括提供组装衬底，将多个光子管芯安装在组装衬底的预定部分上，对准SOI衬底和组装衬底，将SOI衬底和组件衬底接合以形成复合衬底结构，并且在 组合衬底的至少一部分从复合衬底结构。

    VERTICAL INTEGRATION OF CMOS ELECTRONICS WITH PHOTONIC DEVICES
    6.
    发明公开
    VERTICAL INTEGRATION OF CMOS ELECTRONICS WITH PHOTONIC DEVICES 审中-公开
    VERTIKALE INTEGRATION VON CMOS-ELEKTRONIK MIT PHOTONISCHEN BAUELEMENTEN

    公开(公告)号：EP2805352A1

    公开(公告)日：2014-11-26

    申请号：EP13738701.5

    申请日：2013-01-18

    Applicant: Skorpios Technologies, Inc.

    Inventor： DALLESASSE, John ,  KRASULICK, Stephen B. ,  CREAZZO, Timothy ,  MARCHENA, Elton

    IPC: H01L27/14 ,  H01L27/12

    CPC classification number: H01L27/14689 ,  H01L21/76254 ,  H01L21/8221 ,  H01L21/8258 ,  H01L21/84 ,  H01L27/0688 ,  H01L27/12 ,  H01L27/14625 ,  H01L27/14634 ,  H01L27/14643 ,  H01L27/14687 ,  H01L27/15

    Abstract: A method of fabricating a composite semiconductor structure includes providing an SOI substrate including a plurality of silicon-based devices, providing a compound semiconductor substrate including a plurality of photonic devices, and dicing the compound semiconductor substrate to provide a plurality of photonic dies. Each die includes one or more of the plurality of photonics devices. The method also includes providing an assembly substrate having a base layer and a device layer including a plurality of CMOS devices, mounting the plurality of photonic dies on predetermined portions of the assembly substrate, and aligning the SOI substrate and the assembly substrate. The method further includes joining the SOI substrate and the assembly substrate to form a composite substrate structure and removing at least the base layer of the assembly substrate from the composite substrate structure.

    Abstract translation: 制造复合半导体结构的方法包括提供包括多个硅基器件的SOI衬底，提供包括多个光子器件的化合物半导体衬底，以及切割化合物半导体衬底以提供多个光子管芯。 每个管芯包括多个光子器件中的一个或多个。 该方法还包括提供具有基底层和包括多个CMOS器件的器件层的组装衬底，将多个光子管芯安装在组装衬底的预定部分上，以及对准SOI衬底和组件衬底。 该方法还包括将SOI衬底和组件衬底接合以形成复合衬底结构，并从组合衬底结构去除组装衬底的至少基底层。

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