公开(公告)号：JP2008187077A

公开(公告)日：2008-08-14

申请号：JP2007020614

申请日：2007-01-31

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: H01L21/336 ,  H01L21/8238 ,  H01L27/08 ,  H01L27/092 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method of a thin film semiconductor device in which in-film fixed electric charges in a gate insulating film below a semiconductor thin film as an active layer and an interface level can be lowered without making the gate insulating film thick nor increasing process procedures, and then a bottom gate type TFT with high reliability can be obtained. SOLUTION: A gate electrode is formed on a substrate and a gate insulating film is formed on the substrate using a silicon oxynitride film to cover the gate electrode. After the semiconductor thin film is formed on the gate insulating film, oxygen is bonded to an oxygen deficient portion of the silicon oxynitride film constituting the gate insulating film through a heat treatment in an oxidizing atmosphere containing oxygen for modification. The heat treatment is carried out in a pressurized steam atmosphere. Further, a heat oxide film is grown in a surface layer of the semiconductor thin film in the heat treatment. COPYRIGHT: (C)2008,JPO&INPIT

公开(公告)号：JP2005108930A

公开(公告)日：2005-04-21

申请号：JP2003336939

申请日：2003-09-29

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KUNII MASABUMI

IPC: H01L51/50 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/786 ,  H05B33/10 ,  H05B33/14

CPC classification number: H01L29/78696 ,  H01L27/1214 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78618 ,  H01L29/78675 ,  H01L29/78678

Abstract: PROBLEM TO BE SOLVED: To form a thin-film transistor that has high operating speed and small variations in characteristics by using a polycrystalline semiconductor thin film with a small number of processes, and to provide a method for manufacturing the thin-film transistor for further increasing the size of substrate. SOLUTION: A source/drain layer 24 made of a polycrystalline semiconductor thin film containing impurities is formed on a substrate 21 by a reactive thermal CVD method which utilizes reaction energy of a plurality of different gases. By patterning the source-drain layer 24, a source region 24a and a drain region 24b are formed. While the source region 24a and the drain region 24b are in a state of being covered, an active layer 25 made of a polycrystalline semiconductor thin film is formed by the reactive thermal CVD method, by utilizing the reactive energy of the plurality of different gases. A gate insulating film 26 is formed on the active layer 25. A gate electrode 27 is formed on the end of the source region 24a and the drain region 24b via the gate insulating film 26 and the active layer 25 so that both the ends are arranged overlapping in a prescribed state. COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：通过使用少量工艺的多晶半导体薄膜，形成具有高工作速度和特性变化小的薄膜晶体管，并提供一种制造薄膜的方法 晶体管用于进一步增加衬底的尺寸。 解决方案：通过利用多种不同气体的反应能的反应热CVD方法，在基板21上形成由含有杂质的多晶半导体薄膜制成的源极/漏极层24。 通过图案化源极 - 漏极层24，形成源极区域24a和漏极区域24b。 在源极区域24a和漏极区域24b处于被覆盖状态的同时，通过利用多种不同气体的无功能量，通过反应性热CVD法形成由多晶半导体薄膜构成的有源层25。 栅极绝缘膜26形成在有源层25上。栅极电极27通过栅极绝缘膜26和有源层25形成在源极区域24a和漏极区域24b的端部上，使得两个端部布置 在规定状态下重叠。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2004111423A

公开(公告)日：2004-04-08

申请号：JP2002267979

申请日：2002-09-13

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KUNII MASABUMI

IPC: G02F1/136 ,  G02F1/1362 ,  G02F1/1365 ,  G02F1/1368 ,  H01L21/20 ,  H01L21/336 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device which can form a thinned semiconductor layer having a large crystal grain size without increasing the number of steps. SOLUTION: The method for manufacturing the semiconductor device includes a step of melt recrystallizing a semiconductor layer 32 of a thickness formed on a substrate 30 in a lateral growth by emitting an energy beam to the layer 32, and a step of forming an insulating oxide film 33 on the layer 32 by oxidizing the layer 32 at a high pressure and thinning the layer 32. COPYRIGHT: (C)2004,JPO

公开(公告)号：JP2003188181A

公开(公告)日：2003-07-04

申请号：JP2001380770

申请日：2001-12-13

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: G02F1/1368 ,  H01L21/20 ,  H01L21/322 ,  H01L21/336 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To provide a method for fabricating a thin film transistor exhibiting excellent mobility and hot carrier resistance and to realize a high performance thin film transistor. SOLUTION: The method for fabricating a thin film transistor having a multilayer structure of a semiconductor thin film, an oxide film and a gate electrode comprises a step for forming a semiconductor thin film of polysilicon on an insulating substrate, a step for forming an oxide film on the semiconductor thin film, an annealing step performing a heat treatment in the pressure atmosphere of a gas containing oxygen atoms following to the step for forming an oxide film, a step for forming an anti-desorption film of oxygen on the oxide film following to the annealing step, and a hydrogenation step performing heat treatment following to the step for forming an anti-desorption film of oxygen. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2002158358A

公开(公告)日：2002-05-31

申请号：JP2000352712

申请日：2000-11-20

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: G02F1/1368 ,  G09F9/00 ,  G09F9/30 ,  H01L21/265 ,  H01L21/336 ,  H01L27/32 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To provide a method for effectively activating an impurity by using a quick heating method. SOLUTION: A method for manufacturing a thin film semiconductor device comprises a semiconductor thin film forming step of forming a semiconductor thin film 5 having crystallinity in a state in which the film is coupled along a main surface of a substrate 10 to manufacture the device in which a plurality of thin film transistors are distributed on the substrate 10, each thin film transistor has a top gate structure in which a gate electrode 1 is arranged on an upper surface of the film 5 via a gate insulating film 3, an element region isolating step of isolating the film 5 of the continued state to individual element regions by etching, a gate insulating film forming step of forming the film 3 to cover the separated films 5 on the element regions, a gate electrode forming step of forming the gate electrode 1 on the film 3, an impurity implanting step of forming a source region S and a drain region D by field accelerating and emitting an ionized impurity to the film 3 and implanting the impurity of a dose of a range capable of preserving the crystallinity to the film 5, and an impurity activating step of activating the impurity implanted in the film 5 by a quick heating method using a lamp as a heat source.

公开(公告)号：JP2002057339A

公开(公告)日：2002-02-22

申请号：JP2000241984

申请日：2000-08-10

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: G02F1/136 ,  G02F1/1368 ,  G09F9/30 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/08 ,  H01L27/12 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To provide a thin film semiconductor device suitable to drive with a small power consumption and to display a high quality image, by integrating a thin film transistor for a circuit drivable at a low voltage and a thin film transistor for a pixel having a small leakage current on the same substrate. SOLUTION: A pixel array of the thin film semiconductor device has pixel electrodes 11 and thin film transistors TFT-PXL for the pixels to switch to drive the electrodes 11. A peripheral circuit has a drive circuit including the thin film transistors TFT-CKT for the circuit for driving the thin film transistors for the pixels. Each thin film transistor has a laminated structure obtained by overlapping a semiconductor thin film 5, a gate electrode 1 and gate insulating films 2 and 3 interposed between the film 5 and the electrode 1. The film 5 has a channel region ch disposed at an inside from an end E of the electrode 1, a low concentration impurity region LDD continuing to the outside of the channel region, a high concentration impurity region S/D continuing to the outside of the low concentration impurity region, and a concentration boundary B isolated via the low concentration impurity region and the high concentration impurity region. A position X of the boundary B measured with the end E of the gate electrode as a reference is set at the TFT-CKT side to the inside from the TFT- PXL.

公开(公告)号：JP2001168344A

公开(公告)日：2001-06-22

申请号：JP35321699

申请日：1999-12-13

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: G09F9/30 ,  G02F1/136 ,  G02F1/1368 ,  H01L21/265 ,  H01L21/336 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To provide a technique for activating impurities implanted to a semiconductor thin film without generating dispersion of characteristic of a thin film transistor and without generating troubles in a manufacturing device. SOLUTION: An implantation process for forming a source region and a drain region of a thin film transistor by selectively implanting impurities to a semiconductor thin film, and a heating process for activation by heating the implanted impurities, are carried out for manufacturing a thin film transistor. The transistor has a lamination constitution comprising a semiconductor thin film, a gate insulation film formed in contact with its one surface, and a gate electrode stacked in a semiconductor thin film via a gate insulation film, and is arranged on the insulation substrate O. In the heating process, the insulation substrate O is transferred while being heated by heat sources 71 to 74 along a proceeding direction at a specified velocity, at the heating temperature of the heat sources 71 to 74 arranged along a proceeding direction from a loading opening 76 to an unloading opening 77 of the insulation substrate O set to change from a low temperature to a low temperature via a high temperature.

公开(公告)号：JP2000299465A

公开(公告)日：2000-10-24

申请号：JP10764499

申请日：1999-04-15

Applicant: SONY CORP

Inventor： KUNII MASABUMI

IPC: H01L21/265 ,  H01L21/336 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To stabilize electrical characteristics and process of a thin-film transistor by controlling impurity implantation made to the transistor. SOLUTION: A gate electrode 1 is arranged on a substrate O and has slope sections, which are inclined with respect to the flat surface of the substrate O. Thin semiconductor films 5 are formed along the sloped sections of the electrode 1 and have inclined regions LDD containing a selectively implanted impurity. The impurity is implanted into the region LDD with a prescribed acceleration voltage after ionization. The acceleration voltage is set according to the thickness of the thin semiconductor films 5. In the films 5, source regions and drains regions are also formed. in addition, an interlayer insulating film 7 is formed to cover them and wiring electrodes 19 and pixel electrodes 11 are electrically connected to the source region and drain regions through contact holes formed by etching. The source and drain regions contain phosphorus and oxygen and the etching resistances of the source and drain regions are secured by controlling the concentrations of the phosphorus and oxygen, in such a way that the volumetric concentration of at least one of the elements does not exceed the prescribed value.