公开(公告)号：DE69127607D1

公开(公告)日：1997-10-16

申请号：DE69127607

申请日：1991-11-27

Applicant: SONY CORP

Inventor： MITA MICHIO ,  SATO KIMIYASU ,  NISHIMOTO HIDETOSHI

IPC: G11B27/024 ,  G11B27/028 ,  G11B27/34 ,  G11B27/36 ,  H04H60/04 ,  H04N5/268 ,  H04H7/00 ,  H04Q3/52

Abstract: Matrix switcher apparatus includes a plurality of switcher units (MSU1 to MSU4) connected in tandem, each switcher unit including a plurality of input terminals (TI1, TI2) and a plurality of output terminals (TO1, TO2). From a plurality of transmission/reception units (TR) each provided in each switcher unit and in a remote controlling unit (RCU1, RCU2) outputting switching data, a first one of the transmission/reception units (TR) set to a master station mode sequentially polls the remaining transmission/reception units (TR) set to a slave station mode to store the switching data outputting from each transmission/reception unit (TR) for collectively transmitting the stored switching data over a serial busline (SB). The remaining transmission/reception units (TR) receive only relevant data from the switching data transmitted over the serial busline (SB) to supply the relevant data to a controlling unit (CNT) controlling the turning on and off of crosspoint switches (X11 to X22) of each switcher unit.

公开(公告)号：DE69033249T2

公开(公告)日：2000-02-03

申请号：DE69033249

申请日：1990-06-27

Applicant: SONY CORP

Inventor： TSUCHIYA KAZUHISA ,  MITA MICHIO

IPC: G11B15/087 ,  G11B27/032 ,  G11B27/28 ,  G11B27/30 ,  G11B27/32 ,  G11B27/34

Abstract: A video signal recording apparatus for recording a video signal composed of a plurality of programs and control data on a recording medium, comprises: first time code generating circuit for generating first time code data having a user's bit area in which information data relating to the contents of the program are formed; inserting circuit for inserting the first time code data into predetermined horizontal period in a vertical blanking interval of the video signal; first recording circuit for recording the output signal of the inserting circuit on a video track of the recording medium; second time code generating circuit for generating second time code data having a user's bit area in which stop control data used for controlling the transport of the recording medium are formed; and second recording circuit for recording the second time code data on a longitudinal track of the recording medium such that the stop control data are positioned at a predetermined location of the longitudinal track corresponding to a cue point of the video signal.

公开(公告)号：DE69127607T2

公开(公告)日：1998-02-12

申请号：DE69127607

申请日：1991-11-27

Applicant: SONY CORP

Inventor： MITA MICHIO ,  SATO KIMIYASU ,  NISHIMOTO HIDETOSHI

IPC: G11B27/024 ,  G11B27/028 ,  G11B27/34 ,  G11B27/36 ,  H04H60/04 ,  H04N5/268 ,  H04H7/00 ,  H04Q3/52

Abstract: Matrix switcher apparatus includes a plurality of switcher units (MSU1 to MSU4) connected in tandem, each switcher unit including a plurality of input terminals (TI1, TI2) and a plurality of output terminals (TO1, TO2). From a plurality of transmission/reception units (TR) each provided in each switcher unit and in a remote controlling unit (RCU1, RCU2) outputting switching data, a first one of the transmission/reception units (TR) set to a master station mode sequentially polls the remaining transmission/reception units (TR) set to a slave station mode to store the switching data outputting from each transmission/reception unit (TR) for collectively transmitting the stored switching data over a serial busline (SB). The remaining transmission/reception units (TR) receive only relevant data from the switching data transmitted over the serial busline (SB) to supply the relevant data to a controlling unit (CNT) controlling the turning on and off of crosspoint switches (X11 to X22) of each switcher unit.

公开(公告)号：DE3048692A1

公开(公告)日：1981-09-10

申请号：DE3048692

申请日：1980-12-23

Applicant: SONY CORP

Inventor： MITA MICHIO

IPC: G11B20/18 ,  G11B27/024 ,  G11B27/10 ,  G11B27/32 ,  G11B5/02 ,  H04N5/782

公开(公告)号：AU5782790A

公开(公告)日：1991-01-03

申请号：AU5782790

申请日：1990-06-26

Applicant: SONY CORP

Inventor： TSUCHIYA KAZUHISA ,  MITA MICHIO

IPC: G11B15/087 ,  G11B27/032 ,  G11B27/28 ,  G11B27/30 ,  G11B27/32 ,  G11B27/34 ,  G11B15/02 ,  G11B20/12

Abstract: A video signal recording apparatus for recording a video signal composed of a plurality of programs and control data on a recording medium, comprises: first time code generating circuit for generating first time code data having a user's bit area in which information data relating to the contents of the program are formed; inserting circuit for inserting the first time code data into predetermined horizontal period in a vertical blanking interval of the video signal; first recording circuit for recording the output signal of the inserting circuit on a video track of the recording medium; second time code generating circuit for generating second time code data having a user's bit area in which stop control data used for controlling the transport of the recording medium are formed; and second recording circuit for recording the second time code data on a longitudinal track of the recording medium such that the stop control data are positioned at a predetermined location of the longitudinal track corresponding to a cue point of the video signal.

公开(公告)号：AU538504B2

公开(公告)日：1984-08-16

申请号：AU6540180

申请日：1980-12-15

Applicant: SONY CORP

Inventor： MITA MICHIO

IPC: G11B20/18 ,  G11B27/024 ,  G11B27/10 ,  G11B27/32 ,  G11B27/02 ,  H03K13/32

公开(公告)号：FR2472892A1

公开(公告)日：1981-07-03

申请号：FR8026707

申请日：1980-12-16

Applicant: SONY CORP

Inventor： MITA MICHIO

IPC: G11B20/18 ,  G11B27/024 ,  G11B27/10 ,  G11B27/32 ,  H04N5/91 ,  G06F11/16

公开(公告)号：DE69033249D1

公开(公告)日：1999-09-23

申请号：DE69033249

申请日：1990-06-27

Applicant: SONY CORP

Inventor： TSUCHIYA KAZUHISA ,  MITA MICHIO

IPC: G11B15/087 ,  G11B27/032 ,  G11B27/28 ,  G11B27/30 ,  G11B27/32 ,  G11B27/34

Abstract: A video signal recording apparatus for recording a video signal composed of a plurality of programs and control data on a recording medium, comprises: first time code generating circuit for generating first time code data having a user's bit area in which information data relating to the contents of the program are formed; inserting circuit for inserting the first time code data into predetermined horizontal period in a vertical blanking interval of the video signal; first recording circuit for recording the output signal of the inserting circuit on a video track of the recording medium; second time code generating circuit for generating second time code data having a user's bit area in which stop control data used for controlling the transport of the recording medium are formed; and second recording circuit for recording the second time code data on a longitudinal track of the recording medium such that the stop control data are positioned at a predetermined location of the longitudinal track corresponding to a cue point of the video signal.

公开(公告)号：CA2020257A1

公开(公告)日：1990-12-31

申请号：CA2020257

申请日：1990-06-29

Applicant: SONY CORP

Inventor： TSUCHIYA KAZUHISA ,  MITA MICHIO

IPC: G11B15/087 ,  G11B27/032 ,  G11B27/28 ,  G11B27/30 ,  G11B27/32 ,  G11B27/34

Abstract: A video signal recording apparatus for recording a video signal composed of a plurality of programs and control data on a recording medium, comprises: first time code generating circuit for generating first time code data having a user's bit area in which information data relating to the contents of the program are formed; inserting circuit for inserting the first time code data into predetermined horizontal period in a vertical blanking interval of the video signal; first recording circuit for recording the output signal of the inserting circuit on a video track of the recording medium; second time code generating circuit for generating second time code data having a user's bit area in which stop control data used for controlling the transport of the recording medium are formed; and second recording circuit for recording the second time code data on a longitudinal track of the recording medium such that the stop control data are positioned at a predetermined location of the longitudinal track corresponding to a cue point of the video signal.

公开(公告)号：DE3261640D1

公开(公告)日：1985-02-07

申请号：DE3261640

申请日：1982-01-18

Applicant: SONY CORP

Inventor： MITA MICHIO ,  TAKAYAMA JUN

IPC: G11B27/28 ,  G11B27/02 ,  G11B27/024 ,  G11B27/10 ,  G11B27/32 ,  H04N5/78

Abstract: A time code generator having a time code generating circuit for generating a first time code signal in response to a vertical synchronizing signal, a memory for storing a second time code signal reproduced from a VTR, a circuit for comparing the first time code signal with the second time code signal to produce an inconformity signal, a counter for counting the inconformity signal and a circuit for loading the second time code signal to the time code generating circuit according to an output of the counter.