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公开(公告)号：EP1154641A4
公开(公告)日：2006-11-22
申请号：EP00976315
申请日：2000-11-17
Applicant: SONY CORP
Inventor： NAKAMURA MASASHI , MORIWAKI HISAYOSHI , FURUI SUNAO , HAMADA ICHIRO
CPC classification number: H04N21/426 , H04N5/4401 , H04N7/163 , H04N21/4316 , H04N21/4424 , H04N21/47 , H04N21/818
Abstract: Elements required for a digital television receiver are divided into a plurality of digital signal processor blocks and a host microprocessor block. The blocks are connected by general buses, through which commands and streams of data are transferred to control the operations of the blocks. According to the method, replacing blocks is only needed to adapt a variety of digital television broadcasting systems of different carriers, different modulation techniques and different compression techniques, thus increasing the efficiency in development. It is also adaptable to new services easily by providing additional hardware.
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公开(公告)号：EP1146741A4
公开(公告)日：2006-11-22
申请号：EP00976317
申请日：2000-11-17
Applicant: SONY CORP
Inventor： NAKAMURA MASASHI , MORIWAKI HISAYOSHI , FURUI SUNAO , HAMADA ICHIRO
IPC: G06F21/10 , H04H20/00 , H04H60/23 , H04H60/95 , H04L9/10 , H04N5/00 , H04N5/44 , H04N5/46 , H04N7/16 , H04N7/167 , H04N21/2347 , H04N21/4367 , H04N21/4405 , H04B1/16 , H04H1/00
CPC classification number: H04N21/418 , H04N5/4401 , H04N5/46 , H04N7/163 , H04N7/1675 , H04N21/42607 , H04N21/4408 , H04N21/44231 , H04N21/8166 , H04N2005/4441
Abstract: Elements required for a digital television receiver are divided into a plurality of digital signal processor blocks and a host microprocessor block. The blocks are connected by general buses, through which commands and streams of data are transferred to control the operations of the blocks. An encryption encoder/decoder circuit is provided on each of the blocks to protect contents transferred through the buses. An encryption encoder/decoder circuit is also provided on an interface with plug-in extension cards so as to protect the contents output from the interface.
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3.发明公开METHOD AND APPARATUS FOR DIGITAL SIGNAL PROCESSING AND METHOD OF PROVIDING EXTENSION FUNCTION 审中-公开装置和方法进行数字信号处理和程序提供给延长函数
公开(公告)号：EP1146736A4
公开(公告)日：2005-10-12
申请号：EP00976316
申请日：2000-11-17
Applicant: SONY CORP
Inventor： NAKAMURA MASASHI , MORIWAKI HISAYOSHI , FURUI SUNAO , HAMADA ICHIRO
CPC classification number: H04N21/4183 , G06F9/4411 , G06F15/7867 , H04N5/4401 , H04N21/426 , H04N21/8166
Abstract: Elements required for a digital television receiver are divided into a plurality of digital signal processor blocks and a host microprocessor block. The blocks are connected by general buses, through which commands and streams of data are transferred to control the operations of the blocks. Plug-in extension cards detachable to the buses are provided for potential new services. The plug-in extension cards include hardware for implementing extended functions and store command scripts for the hardware. When a plug-in extension card is connected to a bus through an interface, command scripts are uploaded to the host microprocessor block that in turn operates the plug-in extension card based on the received command scripts.
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公开(公告)号：CA2360552C
公开(公告)日：2009-01-20
申请号：CA2360552
申请日：2000-11-17
Applicant: SONY CORP
Inventor： MORIWAKI HISAYOSHI , NAKAMURA MASASHI , FURUI SUNAO , HAMADA ICHIRO
IPC: H04N21/418 , G06F21/10 , H04B1/16 , H04H20/00 , H04H60/23 , H04H60/95 , H04L9/10 , H04N5/00 , H04N5/44 , H04N5/46 , H04N7/16 , H04N7/167 , H04N21/2347 , H04N21/4367 , H04N21/4405
Abstract: Elements necessary for a digital television receiver are structured as a plurality of digital signal processing blocks and a host arithmetic operation processing block. The blocks are connected through a general purpose bus. Commands for controlling operations of the blocks and data of a stream are transferred through the bus. When an encryption encoder /decode is disposed in each block, contents transferred through the bus can be protected. When an encryption encoder / decode circuit is disposed in an interface to which an extension plug-in card is attached, contents that are output from the interface can be protected.
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5.发明专利
公开(公告)号：CA2360550C
公开(公告)日：2007-01-23
申请号：CA2360550
申请日：2000-11-17
Applicant: SONY CORP
Inventor： MORIWAKI HISAYOSHI , FURUI SUNAO , HAMADA ICHIRO , NAKAMURA MASASHI
Abstract: Elements necessary for a digital television receiver are structured as blocks that are a plurality of digital signal processing blocks and a host arithmetic operation processing block. The blocks are connected through a general-purpose bus. Commands for controlling operations of the blocks and data of streams are transferred through the bus. An extension plug-in card for a new service can be attached and detached to / from the bus. The extension plug-in card has hardware that accomplishes an extension function and a script for commands of the hardware. When the extension plug-in card is attached to the bus through an interface, the script for the commands is automatically uploaded to the host arithmetic operation processing block side. The host arithmetic operation processing block can operate the extension plug-in card corresponding to the transferred script for the commands.
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Patent Agency Ranking6.发明专利
公开(公告)号：AU770178B2
公开(公告)日：2004-02-12
申请号：AU1414901
申请日：2000-11-17
Applicant: SONY CORP
Inventor： NAKAMURA MASASHI , MORIWAKI HISAYOSHI , FURUI SUNAO , HAMADA ICHIRO
Abstract: Elements necessary for a digital television receiver are structured as blocks that are a plurality of digital signal processing blocks and a host arithmetic operation processing block. The blocks are connected through a general-purpose bus. Commands for controlling operations of the blocks and data of streams are transferred through the bus. An extension plug-in card for a new service can be attached and detached to / from the bus. The extension plug-in card has hardware that accomplishes an extension function and a script for commands of the hardware. When the extension plug-in card is attached to the bus through an interface, the script for the commands is automatically uploaded to the host arithmetic operation processing block side. The host arithmetic operation processing block can operate the extension plug-in card corresponding to the transferred script for the commands.
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公开(公告)号：ID30059A
公开(公告)日：2001-11-01
申请号：ID20011554
申请日：2000-11-27
Applicant: SONY CORP
Inventor： NAKAMURA MASASHI , MORIWAKI HISAYOSHI , FURUI SUNAO , HAMADA ICHIRO
Abstract: Elements necessary for a digital television receiver are structured as a plurality of digital signal processing blocks and a host operation processing block. The blocks are connected through a general-purpose bus. Command for controlling the operations of the blocks and data of streams are transferred through the bus. Thus, by replacing only blocks, various types of digital television broadcasts that differ in carrier waves, modulating systems, and compressing systems can be handled. Consequently, the developing efficiency of a television receiver is improved. In addition, when a new service is started, by adding hardware for the service, the service can be easily handled.
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公开(公告)号：AU1414801A
公开(公告)日：2001-05-30
申请号：AU1414801
申请日：2000-11-17
Applicant: SONY CORP
Inventor： NAKAMURA MASASHI , MORIWAKI HISAYOSHI , FURUI SUNAO , HAMADA ICHIRO
Abstract: Elements necessary for a digital television receiver are structured as a plurality of digital signal processing blocks and a host operation processing block. The blocks are connected through a general-purpose bus. Command for controlling the operations of the blocks and data of streams are transferred through the bus. Thus, by replacing only blocks, various types of digital television broadcasts that differ in carrier waves, modulating systems, and compressing systems can be handled. Consequently, the developing efficiency of a television receiver is improved. In addition, when a new service is started, by adding hardware for the service, the service can be easily handled.
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9.发明专利
公开(公告)号：CA2360550A1
公开(公告)日：2001-05-25
申请号：CA2360550
申请日：2000-11-17
Applicant: SONY CORP
Inventor： MORIWAKI HISAYOSHI , FURUI SUNAO , NAKAMURA MASASHI , HAMADA ICHIRO
Abstract: Elements required for a digital television receiver are divided into a plurality of digital signal processor blocks and a host microprocessor block . The blocks are connected by general buses, through which commands and stream s of data are transferred to control the operations of the blocks. Plug-in extension cards detachable to the buses are provided for potential new services. The plug-in extension cards include hardware for implementing extended functions and store command scripts for the hardware. When a plug-i n extension card is connected to a bus through an interface, command scripts a re uploaded to the host microprocessor block that in turn operates the plug-in extension card based on the received command scripts.
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公开(公告)号：CA2290309A1
公开(公告)日：2000-05-26
申请号：CA2290309
申请日：1999-11-24
Applicant: SONY CORP
Inventor： KOHASHI TAKASHI , NAKAMURA MASASHI , KIMURA YUJI , OGINO AKIRA , NAKAMURA OSAMU , IKEDA NOZOMU
Abstract: A copyright protection method and apparatus, an output method and device, and a recording method and device for protecting information signals that are transmitted and stored in both a baseband signal status and a compressed encoded data status are provided. The method includes the stops of superimposing a first copyright protection information as a digital watermark on a signal in a baseband state, and compression encoding the signal in the baseband to form an information signal in a compressed encoded data state. The signal in the baseband and the signal in the compressed encoded data are then transmitted from a first apparatus to a second apparatus. The second apparatus determines whether rewriting of the first copyright protection information superimposed on the signal in the baseband and the signal in the compressed encoded data state is necessary, and if it is determined that rewriting of the first copyright protection information is necessary, rewriting the first copyright protection information as a digital watermark on the signal in said baseband state only.
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