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    Coding apparatus and method
    4.
    发明专利
    Coding apparatus and method 未知

    公开(公告)号：GB2460325B

    公开(公告)日：2012-11-07

    申请号：GB0908296

    申请日：2009-05-14

    Applicant: SONY CORP

    Inventor： KONDOU KEITAROU ,  NODA MAKOTO

    IPC: H03M13/27 ,  G11B20/18

    Abstract: Disclosed herein is an encoding apparatus which combines an RLL code word and an error correction code word, with an interleaving technique when encoding, including: an error correction encoding section; an interleaving section; and an RLL encoding section, wherein, if an address i (i is an integer satisfying relations 0≦̸i 0.

    Interleaving and RLL coding apparatus
    5.
    发明专利
    Interleaving and RLL coding apparatus 未知

    公开(公告)号：GB2460325A

    公开(公告)日：2009-12-02

    申请号：GB0908296

    申请日：2009-05-14

    Applicant: SONY CORP

    Inventor： KONDOU KEITAROU ,  NODA MAKOTO

    IPC: H03M13/27 ,  G11B20/18

    Abstract: An encoding apparatus which combines an RLL (run length limited) code word and an error correction code word, with an interleaving technique when encoding, including: an error correction encoding section; an interleaving section; and an RLL encoding section, wherein, if an address i (i is an integer satisfying relations 0 0iThis interleaves symbols of each error correction code word to both high and low bytes of RLL code words to reduce decoded bit error rate.

    Receiving device, reception method, transmission and reception device, transmission and reception method
    7.
    发明专利
    Receiving device, reception method, transmission and reception device, transmission and reception method 审中-公开
    接收设备，接收方法，传输和接收设备，传输和接收方法

    公开(公告)号：JP2014195156A

    公开(公告)日：2014-10-09

    申请号：JP2013070438

    申请日：2013-03-28

    Applicant: Sony Corp ,  ソニー株式会社

    Inventor： TAMENGI MASAYA ,  KONDO KEITARO ,  NODA MAKOTO

    IPC: H04L27/36

    Abstract: PROBLEM TO BE SOLVED: To provide a receiving device which easily corrects IQ phase error.SOLUTION: In a receiving device, a signal acquisition unit acquires a demodulated signal by performing orthogonal demodulation on a modulated signal generated by orthogonal modulation, at a condition having a predetermined frequency difference between a transmission side carrier frequency used by the orthogonal modulation and a reception side carrier frequency used by the orthogonal demodulation. A phase control unit adjusts phase of the reception side carrier frequency, based on the demodulated signal. The present art can be applied to a case such as correcting IQ phase error as a difference of a phase difference between I component and Q component from 90 degrees, in a communication in a carrier based communication system performing orthogonal modulation and orthogonal demodulation.

    Abstract translation: 要解决的问题：提供一种容易纠正IQ相位误差的接收装置。解决方案：在接收装置中，信号获取单元通过对正交调制产生的调制信号执行正交解调获取解调信号，具有 通过正交调制使用的发送侧载波频率与通过正交解调使用的接收侧载波频率之间的预定频率差。 相位控制单元基于解调信号来调整接收侧载波频率的相位。 在进行正交调制和正交解调的基于载波的通信系统中的通信中，本技术可以应用于诸如将IQ相位误差作为I分量和Q分量之间的相位差的差90度校正的情况。

    Thin-film transistor, method for manufacturing the same, and electronic device
    8.
    发明专利
    Thin-film transistor, method for manufacturing the same, and electronic device 审中-公开
    薄膜晶体管，其制造方法和电子器件

    公开(公告)号：JP2013033886A

    公开(公告)日：2013-02-14

    申请号：JP2011170002

    申请日：2011-08-03

    Applicant: Sony Corp ,  ソニー株式会社

    Inventor： NODA MAKOTO ,  ONO HIDEKI ,  NOMOTO AKIHIRO

    IPC: H01L29/786 ,  G09F9/30 ,  H01L21/28 ,  H01L21/336 ,  H01L29/41 ,  H01L29/417 ,  H01L51/50

    Abstract: PROBLEM TO BE SOLVED: To provide a thin-film transistor which more stably operates despite being compact.SOLUTION: The thin-film transistor comprises: a gate electrode; an organic semiconductor layer arranged to face the gate electrode via an insulating film; an insulating structure provided on the organic semiconductor layer; a source electrode and a drain electrode which are arranged apart from each other and are in contact with part of the upper surface of the organic semiconductor layer respectively; and a conductive material layer which covers the insulating structure, is connected to the source electrode, and is separated from the drain electrode.

    Abstract translation: 要解决的问题：提供尽管紧凑的更稳定操作的薄膜晶体管。 薄膜晶体管包括：栅电极; 经由绝缘膜与所述栅电极相对配置的有机半导体层; 设置在有机半导体层上的绝缘结构; 源极电极和漏极电极，它们彼此分开布置并分别与有机半导体层的上表面的一部分接触; 并且覆盖绝缘结构的导电材料层连接到源电极，并与漏电极分离。 版权所有（C）2013，JPO＆INPIT

    Thin film element assembly
    9.
    发明专利
    Thin film element assembly 审中-公开
    薄膜元件总成

    公开(公告)号：JP2012238753A

    公开(公告)日：2012-12-06

    申请号：JP2011107287

    申请日：2011-05-12

    Applicant: Sony Corp ,  ソニー株式会社

    Inventor： YUKAWA GEN ,  YAGI IWAO ,  NODA MAKOTO ,  KATSUHARA MASAHISA

    IPC: H01L21/336 ,  G02F1/1368 ,  G02F1/167 ,  H01L29/786 ,  H01L51/50 ,  H05B33/02

    CPC classification number: H01L51/0097 ,  H01L51/5237 ,  H01L2251/5338 ,  Y02E10/549 ,  Y02P70/521 ,  Y10T428/24612 ,  Y10T428/24752

    Abstract: PROBLEM TO BE SOLVED: To provide a thin film element assembly having a constitution and a structure in which flaws and damages are hardly caused even when being wound up.SOLUTION: A thin film element assembly includes a plurality of thin film elements 10 on a first surface 21 of a base material 20 having flexibility. In the base material 20, a second region including no thin film element is provided outside a first region including the thin film elements 10, and a projecting part 31 is formed in the second region of the first surface 21, a second region of a second surface 22, or the second regions of the first surface 21 and the second surface 22, of the base material 20.

    Abstract translation: 要解决的问题：提供一种薄膜元件组件，其具有其结构和结构，其中即使在卷绕时也难以产生缺陷和损伤。 解决方案：薄膜元件组件包括在具有柔性的基材20的第一表面21上的多个薄膜元件10。 在基材20中，不包括薄膜元件的第二区域设置在包括薄膜元件10的第一区域的外侧，并且突出部分31形成在第一表面21的第二区域中，第二区域是第二区域 表面22或基材20的第一表面21和第二表面22的第二区域。版权所有：（C）2013，JPO＆INPIT

    Thin film transistor, method of manufacturing the same, display device, and electronic device
    10.
    发明专利
    Thin film transistor, method of manufacturing the same, display device, and electronic device 审中-公开
    薄膜晶体管，其制造方法，显示器件和电子器件

    公开(公告)号：JP2011082419A

    公开(公告)日：2011-04-21

    申请号：JP2009234972

    申请日：2009-10-09

    Applicant: Sony Corp ,  ソニー株式会社

    Inventor： NODA MAKOTO ,  SUMINO KOJI ,  KATSUHARA MASAHISA ,  KAWASHIMA NORIYUKI ,  YASUDA RYOICHI

    IPC: H01L29/786 ,  H01L21/336 ,  H01L51/05 ,  H01L51/30 ,  H01L51/40

    Abstract: PROBLEM TO BE SOLVED: To provide a high performance thin film transistor that is not only applicable to a structure where a high mobility and low molecule organic semiconductor material is used but also small in connection resistance between source-drain electrodes and an organic semiconductor layer while maintaining the good transistor characteristics.
    SOLUTION: A pair of hydrophilic patterns 19 are disposed on a substrate 11 covered with a hydrophilic gate insulating film 15, and a source electrode 21s and a drain electrode 21d composed using carbon nanotubes are selectively disposed on the pair of hydrophilic patterns 19. The organic semiconductor layer 23 is formed between the source electrode 21s and drain electrode 21d. The organic semiconductor layer 23 is composed of pentacene.
    COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种高性能薄膜晶体管，其不仅可应用于使用高迁移率和低分子有机半导体材料的结构，而且还可用于源 - 漏电极与有机物之间的连接电阻小 同时保持良好的晶体管特性。 解决方案：一对亲水图案19设置在被亲水性栅极绝缘膜15覆盖的基板11上，并且使用碳纳米管构成的源电极21s和漏电极21d选择性地设置在一对亲水图案19上 在源电极21s和漏电极21d之间形成有机半导体层23。 有机半导体层23由并五苯构成。 版权所有（C）2011，JPO＆INPIT

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