公开(公告)号：AT29096T

公开(公告)日：1987-09-15

申请号：AT82306619

申请日：1982-12-10

Applicant: SONY CORP

Inventor： ONGA MATOTO ,  SASE MASATOSHI ,  YAMANAKA SEISUKE

IPC: H04N9/07 ,  G11C27/02 ,  H04N9/04

Abstract: A plurality of sampled outputs Y H1 , Y H2 which differ in phase by 2π/N from one another are mixed together. The sampled outputs are sequentially supplied by a switch 63 to a holding circuit 64, 65 whereby the deterioration of the high frequency characteristic of the synthesized output signal due to low-pass filter effects stemming from the zero hold in the sample/hold circuit can be prevented.

公开(公告)号：DE3277052D1

公开(公告)日：1987-09-24

申请号：DE3277052

申请日：1982-12-10

Applicant: SONY CORP

Inventor： ONGA MATOTO ,  SASE MASATOSHI ,  YAMANAKA SEISUKE

IPC: H04N9/07 ,  G11C27/02 ,  H04N9/04

Abstract: A plurality of sampled outputs Y H1 , Y H2 which differ in phase by 2π/N from one another are mixed together. The sampled outputs are sequentially supplied by a switch 63 to a holding circuit 64, 65 whereby the deterioration of the high frequency characteristic of the synthesized output signal due to low-pass filter effects stemming from the zero hold in the sample/hold circuit can be prevented.