-
公开(公告)号：DE68914555T2
公开(公告)日：1994-08-04
申请号：DE68914555
申请日：1989-09-07
Applicant: SONY CORP
Inventor： HAYASHI ERIKO , SAKAI TADASHI , NODA FUMIO
Abstract: A radio receiver (1) having a synthesizer-type receiving circuit, in which the received broadcast signal is determined by varying a frequency-dividing ratio in a phase-locked loop, is provided with a display (10i) which shows in respective areas (12A-12J) of a tabular format the names of various geographic regions and of broadcasting stations that can be received in the respective geographic regions, and with a memory having addresses for storing data corresponding to frequencies needed for the reception of respective broadcasting stations receivable in the various geographic regions. A signal forming circuit, for example, responsive to coded information (11A-11D) on the display, provides signals indicating respective geographic regions whose names are selectively displayed, and channel-selection switches, which are desirably positionally related to respective areas of the tabular format of the display, are selectively actuable for cooperation with the signals from the signal forming circuit in causing a microcomputer to read data stored at respective addresses of the memory and to determine the frequency-dividing ratio from such data.
-
公开(公告)号：CA1246735A
公开(公告)日：1988-12-13
申请号：CA498963
申请日：1986-01-03
Applicant: SONY CORP
Inventor： OKI RYUJI , SAKAI TADASHI
Abstract: ANTENNA CIRCUIT An antenna circuit includes a ferrite core around which a main coil and a negative feedback coil are wound, and a field effect transistor (FET) with its source grounded, and with a voltage induced in the main coil being applied across the gate and the source of the FET to thereby form an aperiodic circuit and the drain of the FET being connected through the negative feedback coil to a load.
-
公开(公告)号：DE68914555T3
公开(公告)日：1999-04-29
申请号：DE68914555
申请日：1989-09-07
Applicant: SONY CORP
Inventor： HAYASHI ERIKO , SAKAI TADASHI , NODA FUMIO
Abstract: A radio receiver (1) having a synthesizer-type receiving circuit, in which the received broadcast signal is determined by varying a frequency-dividing ratio in a phase-locked loop, is provided with a display (10i) which shows in respective areas (12A-12J) of a tabular format the names of various geographic regions and of broadcasting stations that can be received in the respective geographic regions, and with a memory having addresses for storing data corresponding to frequencies needed for the reception of respective broadcasting stations receivable in the various geographic regions. A signal forming circuit, for example, responsive to coded information (11A-11D) on the display, provides signals indicating respective geographic regions whose names are selectively displayed, and channel-selection switches, which are desirably positionally related to respective areas of the tabular format of the display, are selectively actuable for cooperation with the signals from the signal forming circuit in causing a microcomputer to read data stored at respective addresses of the memory and to determine the frequency-dividing ratio from such data.
-
公开(公告)号：GB2169764B
公开(公告)日：1988-09-07
申请号：GB8600169
申请日：1986-01-06
Applicant: SONY CORP
Inventor： OKI RYUJI , SAKAI TADASHI
-
公开(公告)号：DE68914555D1
公开(公告)日：1994-05-19
申请号：DE68914555
申请日：1989-09-07
Applicant: SONY CORP
Inventor： HAYASHI ERIKO , SAKAI TADASHI , NODA FUMIO
Abstract: A radio receiver (1) having a synthesizer-type receiving circuit, in which the received broadcast signal is determined by varying a frequency-dividing ratio in a phase-locked loop, is provided with a display (10i) which shows in respective areas (12A-12J) of a tabular format the names of various geographic regions and of broadcasting stations that can be received in the respective geographic regions, and with a memory having addresses for storing data corresponding to frequencies needed for the reception of respective broadcasting stations receivable in the various geographic regions. A signal forming circuit, for example, responsive to coded information (11A-11D) on the display, provides signals indicating respective geographic regions whose names are selectively displayed, and channel-selection switches, which are desirably positionally related to respective areas of the tabular format of the display, are selectively actuable for cooperation with the signals from the signal forming circuit in causing a microcomputer to read data stored at respective addresses of the memory and to determine the frequency-dividing ratio from such data.
-
Patent Agency Ranking
公开(公告)号：GB2169764A
公开(公告)日：1986-07-16
申请号：GB8600169
申请日：1986-01-06
Applicant: SONY CORP
Inventor： OKI RYUJI , SAKAI TADASHI
-
7.发明专利
公开(公告)号：JP2008283457A
公开(公告)日：2008-11-20
申请号：JP2007125742
申请日：2007-05-10
Inventor： YASUI YUKIHIRO , HISAMATSU YASUAKI , SAKAI TADASHI
Abstract: PROBLEM TO BE SOLVED: To provide a data transfer circuit which is capable of reducing an influence of wiring delay on a transfer line to a data output part and of exactly and precisely taking in data in the data output part to increase a scan speed, a solid-state image sensor, and a camera system.
SOLUTION: A column scan circuit 13 includes: a plurality of selection signal generation parts 131-0 to 131-n for outputting selection signals to corresponding holding circuits synchronously with a supply driving clock; and clock supply lines LMCK1, LCMCK, etc. which propagate a master clock to supply it to the plurality of selection signal generation parts as the driving clock. Data output circuits 17-0 to 17-n include first data synchronizing circuits 172-0 to 172-n for taking in and outputting detection data synchronously with a first taking-in clock SACK1 and second data synchronizing circuits 173-0 to 173-n for taking in output data of first data synchronizing circuits synchronously with a second taking-in clock SACK2.
COPYRIGHT: (C)2009,JPO&INPITAbstract translation: 要解决的问题：提供一种数据传输电路，其能够减少对数据输出部分的传输线上的布线延迟的影响，并且精确且精确地接收数据输出部分中的数据以增加扫描 速度，固态图像传感器和照相机系统。 列扫描电路13包括：多个选择信号生成部分131-0至131-n，用于与供电驱动时钟同步地将选择信号输出到相应的保持电路; 以及传播主时钟以将其提供给多个选择信号生成部分作为驱动时钟的时钟供应线LMCK1，LCMCK等。 数据输出电路17-0至17-n包括与第一取入时钟SACK1和第二数据同步电路173-0至173-n同步地接收和输出检测数据的第一数据同步电路172-0至172-n 用于与第二接收时钟SACK2同步地接收第一数据同步电路的输出数据。 版权所有（C）2009，JPO＆INPIT
-
公开(公告)号：JP2008199270A
公开(公告)日：2008-08-28
申请号：JP2007031889
申请日：2007-02-13
Inventor： SAKAI TADASHI , MORI TOMONORI
Abstract: PROBLEM TO BE SOLVED: To increase an A-D conversion processing speed and reduce power consumption while suppressing the increase of a circuit area, in a solid-state imaging apparatus employing a reference signal comparison type A-D conversion system. SOLUTION: Two kinds of reference signals Vslop which are changed stepwise by 2LSB and have steps of 1LSB are prepared. A reference signal Vslop_2 having a lower level and a pixel signal Vx are compared to hold a count value T during the inversion of a comparison pulse COMP. The reference signal Vslop_2 is switched to a reference signal Vslop_1 to compare the reference signal Vslop_1 and the pixel signal voltage Vx, and the held count value T is corrected on the basis of the comparison result to settle pixel data D. The pixel data D are 2T-1 in the case of (a pixel signal voltage Vxα)>(the reference signal Vslop_1(T)) and 2T in the case of (the pixel signal voltage Vxα) COPYRIGHT: (C)2008,JPO&INPIT
Abstract translation: 要解决的问题：在采用参考信号比较型A-D转换系统的固态成像装置中，为了提高A-D转换处理速度并降低功耗，同时抑制电路面积的增加。 解决方案：准备了通过2LSB逐步改变并具有1LSB步长的两种参考信号Vslop。 比较具有较低电平的参考信号Vslop_2和像素信号Vx，以在比较脉冲COMP的反转期间保持计数值T. 参考信号Vslop_2被切换到参考信号Vslop_1以比较参考信号Vslop_1和像素信号电压Vx，并且基于比较结果校正保持的计数值T.以便建立像素数据D.像素数据D是 在（像素信号电压Vxα）<（参考信号Vslop_1（T））的情况下（像素信号电压Vxα）>（参考信号Vslop_1（T））和2T的情况下的2T-1。 由于A-D转换所需的比较周期减少到1/2，因此A-D转换处理速度可以保持位分辨率并抑制功耗增加。 版权所有（C）2008，JPO＆INPIT
-
9.发明专利
公开(公告)号：JPH11113178A
公开(公告)日：1999-04-23
申请号：JP26753897
申请日：1997-09-30
Applicant: SONY CORP
Inventor： NAGAI TAMIJI , TAKEI TOSHITAKA , SAKAI TADASHI
Abstract: PROBLEM TO BE SOLVED: To avoid an overcharged or an overdischarged state of a secondary battery by a method wherein, when the secondary battery is overcharged or overdischarged, the secondary battery is discharged or charged through an electric circuit. SOLUTION: In a protection circuit 11, the emitter of a P-N-P transistor Tr1 of an on-set circuit 12 is connected to a control circuit 13 and the collector of the P-N-P transistor Tr1 is connected to an electric circuit with which the cathode of a secondary battery BT is connected to a switch circuit 8. Thus, in the protection circuit 11, by supplying pulse control signals S5 continuously from a signal input terminal T, the on-set circuit 12 is kept on and hence the control circuit 13 can reset the switch circuit 8 through a drive circuit 7. With this constitution, the protection circuit 11 can charge or discharge the secondary battery BT by putting the transistors FET1 and FET2 of the switch circuit 8 into continuity the control circuit 13.
-
公开(公告)号：JPH0846724A
公开(公告)日：1996-02-16
申请号：JP19273494
申请日：1994-07-26
Applicant: SONY CORP
Inventor： SUZUKI KUNIHARU , SAKAI TADASHI
Abstract: PURPOSE:To set automatically a tree structure by reproducing a track name located to the recorded tree structure, sending the tree structure being the name of a voice program via a telephone line and detecting reply dial information so as to select the program. CONSTITUTION:A disk reproduction section 59 reproduces a voice program name being a track name located to a tree structure recorded on a disk 50 and sends the tree structure via a telephone line via a system control section 55. Dial information in response to the transmission is detected by an incoming call detection circuit section 52, the disk 50 is reproduced corresponding to the program to be sent via the control section 55 depending on the detection result and sent through a line 36. Through this constitution, it is not required to set manually the tree structure and a music is selected and played at a high speed accurately.
-
-
-
-
-
-
-
-
-
Search Results
41
records
(took 0.026 seconds)
