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公开(公告)号：AU7556974A
公开(公告)日：1976-05-20
申请号：AU7556974
申请日：1974-11-20
Applicant: SONY CORP
Inventor： SHIONOYA TOSHIO
Abstract: A signal transmitting system including an A-D converter for converting an analog input signal to a digital signal and a D-A converter for re-converting the digital signal to an analog output signal is provided with improved fidelity without increasing the number of digital levels and digital bits in the A-D and D-A converters. In such signal transmitting system, the analog input signal is applied to a plurality of voltage level comparators for comparison therein with respective reference voltages which sequentially differ from each other by predetermined voltage increments, the levels of the reference voltages are periodically varied by means of a switching signal, outputs from the level comparators are applied to an encoder which produces a corresponding digital signal, a decoder receives the digital signal and reconverts the latter to an analog signal, and the analog signal from the decoder is added to a switching signal which may be the first mentioned switching signal, or at least has the same period as the latter, to provide a resulting analog output signal which relatively closely corresponds to the analog input signal.
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公开(公告)号：CA1238127A
公开(公告)日：1988-06-14
申请号：CA479797
申请日：1985-04-23
Applicant: SONY CORP
Inventor： SHIONOYA TOSHIO , TSUBOI TAKASHI
Abstract: A plasma display panel having cathodes, anodes and trigger electrodes wherein the trigger electrodes correspond to a plurality of discharge electrodes which are sequentially scanned and wherein an insulating layer separates the trigger electrodes and the discharge electrodes and where a constant trigger voltage is supplied until the plurality of discharge electrodes corresponding to the trigger electrode have been activated. In the invention, the trigger voltage is quickly changed and is then returned to an intermediate level and the frequency of a trigger voltage pulse is reduced to one over the number of block discharged electrodes so that the power consumption of the trigger electrodes is greatly reduced and since the trigger voltage is returned to an intermediate level erroneous discharges will not be generated between inactive trigger electrodes and the other discharge electrodes to which data voltage pulses are supplied thus producing a high definition display. The trigger voltage may swing positive and negative directions with reference to an intermediate level and an ON potential low level of the cathodes which sequentially fall to a low level by scanning activation may be set to be the same as the intermediate level. Thus, the absolute value of the trigger voltage applied to the insulating layer or dielectric layer between the cathode and trigger electrodes can be substantially one-half a required value and plus or minus one-half with reference to an intermediate level and a breakdown voltage of the insulating layer can be decreased. Therefore, stable operation will be provided over long periods of time without dielectric breakdown and in addition the insulating layer can be thin and the trigger voltage can be decreased.
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公开(公告)号：DE69522856D1
公开(公告)日：2001-10-31
申请号：DE69522856
申请日：1995-05-12
Applicant: SONY CORP , TEXAS INSTRUMENTS INC
Inventor： SAMPSELL JEFFREY B , SHIONOYA TOSHIO
Abstract: A display system with a pointer that is not restricted by wires or sensors. The display uses a spatial light modulator (14) for projecting an image on the screen (20). During a time period when all of the cells of the modulator (14) are in the same state, a cursor projected onto the screen by the pointer is reimaged from the screen to a detector (26), which translates the cursor image into signals for a central processing unit (38). The central processing unit (38) then directs the system as to what tasks are being dictated by the cursor.
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4.发明专利
公开(公告)号：GB2000412B
公开(公告)日：1982-01-27
申请号：GB7827055
申请日：1978-06-15
Applicant: SONY CORP
Inventor： SHIONOYA TOSHIO
Abstract: A method and apparatus for displaying a video picture on a matrix array of light emitting elements form of m rows and n columns of such elements. The video signal, which is comprised of periodic vertical intervals, each containing successive line intervals of video information, is sampled at a rate of n samples during each line interval. The resultant, n sampled picture elements for each sampled line interval in each vertical interval are stored. During a vertical interval, a given light emitting element, such as the i-th element in the j-th row, corresponding to a sampled picture element in a respective line interval, is energized for a duration greater than a line interval and less than a vertical interval as a function of the brightness of the sampled picture element when that sampled picture element is between and black and peak white levels. In a practical embodiment, a storage circuit stores the n sampled picture elements in each line in an mxn matrix array of storage elements. These stored, sampled picture elements are recirculated on a row-by-row basis periodically, all of the sampled picture elements being fully recirculated in a period which is less than the vertical interval. Each of the m rows of light emitting elements are conditioned sequentially are repetitively, in synchronism with the recirculation of the sampled picture elements in the storage circuit. A reference voltage generator generates a reference voltage of staircase waveform during each vertical interval, the step interval of the staircase waveform being equal to the aforementioned period. During each such period, the brightness of each picture element which is shifted into the first row of the storage circuit is compared to the reference voltage, and the columns of light emitting elements are selectively enabled for a duration that is a function of the brightness level of corresponding sampled picture elements. A light emitting element is energized if it is disposed in a row which is conditioned and in a column which is enabled.
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公开(公告)号：DE2826549A1
公开(公告)日：1979-01-04
申请号：DE2826549
申请日：1978-06-16
Applicant: SONY CORP
Inventor： SHIONOYA TOSHIO
Abstract: A method and apparatus for displaying a video picture on a matrix array of light emitting elements form of m rows and n columns of such elements. The video signal, which is comprised of periodic vertical intervals, each containing successive line intervals of video information, is sampled at a rate of n samples during each line interval. The resultant, n sampled picture elements for each sampled line interval in each vertical interval are stored. During a vertical interval, a given light emitting element, such as the i-th element in the j-th row, corresponding to a sampled picture element in a respective line interval, is energized for a duration greater than a line interval and less than a vertical interval as a function of the brightness of the sampled picture element when that sampled picture element is between and black and peak white levels. In a practical embodiment, a storage circuit stores the n sampled picture elements in each line in an mxn matrix array of storage elements. These stored, sampled picture elements are recirculated on a row-by-row basis periodically, all of the sampled picture elements being fully recirculated in a period which is less than the vertical interval. Each of the m rows of light emitting elements are conditioned sequentially are repetitively, in synchronism with the recirculation of the sampled picture elements in the storage circuit. A reference voltage generator generates a reference voltage of staircase waveform during each vertical interval, the step interval of the staircase waveform being equal to the aforementioned period. During each such period, the brightness of each picture element which is shifted into the first row of the storage circuit is compared to the reference voltage, and the columns of light emitting elements are selectively enabled for a duration that is a function of the brightness level of corresponding sampled picture elements. A light emitting element is energized if it is disposed in a row which is conditioned and in a column which is enabled.
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Patent Agency Ranking
公开(公告)号：DE69522856T2
公开(公告)日：2002-05-02
申请号：DE69522856
申请日：1995-05-12
Applicant: SONY CORP , TEXAS INSTRUMENTS INC
Inventor： SAMPSELL JEFFREY B , SHIONOYA TOSHIO
Abstract: A display system with a pointer that is not restricted by wires or sensors. The display uses a spatial light modulator (14) for projecting an image on the screen (20). During a time period when all of the cells of the modulator (14) are in the same state, a cursor projected onto the screen by the pointer is reimaged from the screen to a detector (26), which translates the cursor image into signals for a central processing unit (38). The central processing unit (38) then directs the system as to what tasks are being dictated by the cursor.
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公开(公告)号：CA1030265A
公开(公告)日：1978-04-25
申请号：CA214465
申请日：1974-11-22
Applicant: SONY CORP
Inventor： SHIONOYA TOSHIO
Abstract: A signal transmitting system including an A-D converter for converting an analog input signal to a digital signal and a D-A converter for re-converting the digital signal to an analog output signal is provided with improved fidelity without increasing the number of digital levels and digital bits in the A-D and D-A converters. In such signal transmitting system, the analog input signal is applied to a plurality of voltage level comparators for comparison therein with respective reference voltages which sequentially differ from each other by predetermined voltage increments, the levels of the reference voltages are periodically varied by means of a switching signal, outputs from the level comparators are applied to an encoder which produces a corresponding digital signal, a decoder receives the digital signal and reconverts the latter to an analog signal, and the analog signal from the decoder is added to a switching signal which may be the first mentioned switching signal, or at least has the same period as the latter, to provide a resulting analog output signal which relatively closely corresponds to the analog input signal.
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公开(公告)号：DE2528871A1
公开(公告)日：1976-01-15
申请号：DE2528871
申请日：1975-06-27
Applicant: SONY CORP
Inventor： AMANO YOSHIFUMI , SHIONOYA TOSHIO
Abstract: A video display system employing a flat display panel of X-Y matrix type, signal sampling means, "write in" and "read out" memory circuits serially connected between the signal sampling means and the display panel, and a novel signal control means connected to the "write in" and "read out" memory circuits wherein the number of lines or leads for distributing signals from the "read out" memory circuits to the display panel and the number of memory devices used in the "read out" memory circuits are reduced substantially.
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公开(公告)号：CA1262193A
公开(公告)日：1989-10-03
申请号：CA498830
申请日：1985-12-31
Applicant: SONY CORP
Inventor： SHIONOYA TOSHIO
IPC: G09G3/00
Abstract: A liquid crystal display apparatus in which an image to be displayed is written in the liquid crystal cell by irradiating it with a laser beam and in which the image thus written is enlarged and projected on a screen by optical projection means and wherein the invention the amount of energy supplied to a spot in the liquid crystal cell in which an image is to be produced is increased when writing is not and will not be done in immediately preceding and succeeding spots so that the image writing in the liquid crystal cell can be completed within a shorter time.
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公开(公告)号：CA1239235A
公开(公告)日：1988-07-12
申请号：CA479562
申请日：1985-04-19
Applicant: SONY CORP
Inventor： SHIONOYA TOSHIO
Abstract: A protective circuit for a sequentially selecting circuit which selects a series of circuit elements electrodes and the like one by one which are generated by a shift register and including a counter for generating a count output corresponding to the total selection number. An input pulse of the shift register is formed according to the output from the counter and the timing pulse and the counter is reset according to the timing pulse and a clock pulse of the selection. With such arrangement when the timing pulse is not generated, the counter will not operate and an effective input pulse to the shift register will not be generated and therefore the shift register will not sequentially read erroneous inputs and a plurality of shift stage outputs will not be generated at the same time. In this manner, the selected circuits, elements, electrodes and drive circuit of power supply will be prevented from being damaged.
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