公开(公告)号：JPH113593A

公开(公告)日：1999-01-06

申请号：JP11672398

申请日：1998-04-27

Applicant: ST MICROELECTRON INC

Inventor： MCCLURE DAVID CHARLES

IPC: G01R31/28 ,  G11C11/4076 ,  G11C11/419 ,  G11C29/02 ,  G11C29/12 ,  G11C29/46 ,  G11C29/50 ,  G11C29/00

Abstract: PROBLEM TO BE SOLVED: To enable the clock operation of a sense amplifier to be externally controlled by interrupting the usual clock operation of the sense amplifier during the period of test mode and conduct the clock operation of the sense amplifier in compliance with the transition of external control signals. SOLUTION: A block control circuit 20 generates a sense amplifier enable(SAEN) signal 14 which is used for the clock operation of the sense amplifier of a memory device. A detection signal 26 is the logical product of a test mode enable signal 24 and an external control signal. It follows the external control signal when the test mode enable signal 24 is at the high logic state and shows having entered to the test mode. This condition in the test mode enables that the SAEN signal 14 becomes the high logic state which allows the clock operation of the sense amplifier. Thereby, the lock operation of the sense amplifier is made it possible to follow an external control signal.