公开(公告)号：DE69818868T2

公开(公告)日：2006-10-26

申请号：DE69818868

申请日：1998-10-26

Applicant: ST MICROELECTRONICS ASIA

Inventor： PAI PRATIMA ,  DA COSTA GODFREY ,  LEONG YUEN

IPC: G06F9/445 ,  H04M11/06

Abstract: A modem architecture and a method of reducing on-chip memory requirements in a downloadable modem architecture are provided. The preferred architecture consists of a Digital Signal Processor (DSP) ( 6 ) with on-chip Random Access Memory (RAM) ( 12 ). A procedure which exploits inactivity intervals in a modem modulation function is provided. The procedure dynamically downloads the requisite code segments for each phase of the function from a cheaper, slower external memory ( 14 ) into the DSP on-chip RAM during inactivity intervals, thereby reducing the DSP on-chip RAM requirements.

公开(公告)号：DE69821535T2

公开(公告)日：2004-12-16

申请号：DE69821535

申请日：1998-11-14

Applicant: ST MICROELECTRONICS ASIA

Inventor： PAI PRATIMA ,  DA COSTA GODFREY

IPC: H04L25/03 ,  H04L25/49

公开(公告)号：DE69821535D1

公开(公告)日：2004-03-11

申请号：DE69821535

申请日：1998-11-14

Applicant: ST MICROELECTRONICS ASIA

Inventor： PAI PRATIMA ,  DA COSTA GODFREY

IPC: H04L25/03 ,  H04L25/49

公开(公告)号：DE69818868D1

公开(公告)日：2003-11-13

申请号：DE69818868

申请日：1998-10-26

Applicant: ST MICROELECTRONICS ASIA

Inventor： PAI PRATIMA ,  DA COSTA GODFREY ,  LEONG YUEN

IPC: G06F9/445 ,  H04M11/06

Abstract: A modem architecture and a method of reducing on-chip memory requirements in a downloadable modem architecture are provided. The preferred architecture consists of a Digital Signal Processor (DSP) ( 6 ) with on-chip Random Access Memory (RAM) ( 12 ). A procedure which exploits inactivity intervals in a modem modulation function is provided. The procedure dynamically downloads the requisite code segments for each phase of the function from a cheaper, slower external memory ( 14 ) into the DSP on-chip RAM during inactivity intervals, thereby reducing the DSP on-chip RAM requirements.