公开(公告)号：JP2002057225A

公开(公告)日：2002-02-22

申请号：JP2001198300

申请日：2001-06-29

Applicant: ST MICROELECTRONICS INC

Inventor： FERRANT RICHARD J ,  CHAN T C

IPC: H01L27/11 ,  G11C11/412 ,  H01L21/8244

Abstract: PROBLEM TO BE SOLVED: To provide an SRAM memory cell which does not require a pull-up transistor and to provide a method for manufacturing the same. SOLUTION: A first pass gate transistor is connected between a conductive terminal of a first transistor and a first bit line of paired bit lines, and a second pass gate transistor is connected between the conductive terminal of a second transistor and a second bit line of the paired bit lines. Threshold voltages of the first and second pass gate transistors are set, to supply subthreshold currents to the first and second pull-down transistors, if a memory cell is not accessed, so that the conductive terminal of the pull-down transistor to be turned off is maintained at a voltage level corresponding to the logical high voltage.