公开(公告)号：JP2003229887A

公开(公告)日：2003-08-15

申请号：JP2002377571

申请日：2002-12-26

Applicant: ST MICROELECTRONICS INC

Inventor： KARIM FARAYDON O ,  CHANDRA RAMESH ,  STRAMM BERND H

IPC: G06F12/02 ,  H04L12/46 ,  H04L12/56

Abstract: PROBLEM TO BE SOLVED: To provide system independent and scalable packet buffer management architecture for network processors. SOLUTION: A circular buffer storing packets for processing by one or more network processors employs an empty buffer address register identifying where a next received packet should be stored, a next packet address register identifying the next packet to be processed and a packet-processing address register in each network processor identifying the packet being processed by the network processor. N-bit address to the buffer are mapped or masked from/to m-bit packet-processing address registers by software, thereby enabling the buffer size to be fully scalable. A dedicated packet retrieval instruction supported by the network processor retrieves a new packet for processing by using the next packet address register and copies the packet into the related packet- processing address register in order to use the packet in subsequent accesses. COPYRIGHT: (C)2003,JPO

公开(公告)号：DE60234307D1

公开(公告)日：2009-12-24

申请号：DE60234307

申请日：2002-12-24

Applicant: ST MICROELECTRONICS INC

Inventor： KARIM FARAYDON O ,  CHANDRA RAMESH ,  STRAMM BERND H

IPC: G06F12/02 ,  H04L29/06 ,  H04L12/46 ,  H04L12/56

Abstract: A circular buffer storing packets for processing by one or more network processors employs an empty buffer address register identifying where a next received packet should be stored, a next packet address register identifying the next packet to be processed, and a packet-processing address register within each network processor identifying the packet being processed by that network processor. The n-bit addresses to the buffer are mapped or masked from/to the m-bit packet-processing address registers by software, allowing the buffer size to be fully scalable. A dedicated packet retrieval instruction supported by the network processor(s) retrieves a new packet for processing using the next packet address register and copies that into the associated packet-processing address register for use in subsequent accesses. Buffer management is thus independent of the network processor architecture.