公开(公告)号：JP2001093987A

公开(公告)日：2001-04-06

申请号：JP2000230590

申请日：2000-07-31

Applicant: ST MICROELECTRONICS INC

Inventor： GAO GUANG-BO ,  HOANG HOANG HUY

IPC: H01L21/762 ,  H01L21/316 ,  H01L21/76 ,  H01L21/8238 ,  H01L21/8258 ,  H01L27/06 ,  H01L27/092 ,  H01L29/38 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To improve the speed of a semiconductor integrated circuit utilizing the electrical characteristics of a different substance. SOLUTION: By utilizing high electron mobility for GeAs in an N-channel device and a high hole mobility for Ge in a P-channel device, a CMOS integrated circuit with GaAs/Ge is formed on an Si for improving the switching (propagation) delay of a transistor. A semi-insulation (non-doped) layer 102b of GaAs is formed on a silicon base 102a for giving a buffer layer, thus eliminating the possibility of latch-up. Then, a GaAs well 106 and a Ge well 110 are formed on the semi-insulation GaAs layer 102b for electrical isolation by thermal oxide and/or flowing oxide (HSQ) 112. By forming an N-channel MOS device 114 and a P-channel MOS device 116 in the GaAs well 106 and the Ge well 110, respectively, an integrated circuit is formed by interconnection.