MODULE COMMUNICATION CONTROLLER AND METHOD THEREFOR

    公开(公告)号:JP2000124931A

    公开(公告)日:2000-04-28

    申请号:JP23884299

    申请日:1999-08-25

    Abstract: PROBLEM TO BE SOLVED: To provide a system architecture for high-speed serial bus having compatibility with IEEE 1394 standard. SOLUTION: A transaction interface 210 adjusts a data bus sent from an IEEE 1394 bus. A kernel/scheduler/dispatcher 22- allocates memory resources and starts various tasks and services. The task and service change while depending on an application layer. The transaction interface 210 utilizes information derived from a received data packet to arrange the data packet in the suitable task queue. When any other message control block does not exist in a specified queue corresponding to the called task, the called task is immediately started. In the other case, a message control block stands by for being finally processed in the queue.

    2.
    发明专利
    未知

    公开(公告)号:DE69914425D1

    公开(公告)日:2004-03-04

    申请号:DE69914425

    申请日:1999-08-24

    Abstract: A system architecture for a high speed serial bus compatible with the 1394 standard is disclosed. A transaction interface coordinates data packets received from or sent to a 1394 bus. A kernel/scheduler/dispatcher is used to allocate memory resources, and start a variety of tasks and services. The tasks and services vary depending on protocols used in a transport layer and application layer used in conjunction with the 1394 layers. The transaction interface uses information derived from the data packets received to form message control blocks, particular for each individual task, and places the control blocks into the proper task queue. The transaction interface forms a dispatcher message control block and places it into the scheduler/dispatcher queue to initiate the task. If there are no other message control blocks in the queue particular for the called task, the called task is immediately started. Otherwise, the message control block waits in the queue to eventually be operated on.

    3.
    发明专利
    未知

    公开(公告)号:DE69914425T2

    公开(公告)日:2004-12-02

    申请号:DE69914425

    申请日:1999-08-24

    Abstract: A system architecture for a high speed serial bus compatible with the 1394 standard is disclosed. A transaction interface coordinates data packets received from or sent to a 1394 bus. A kernel/scheduler/dispatcher is used to allocate memory resources, and start a variety of tasks and services. The tasks and services vary depending on protocols used in a transport layer and application layer used in conjunction with the 1394 layers. The transaction interface uses information derived from the data packets received to form message control blocks, particular for each individual task, and places the control blocks into the proper task queue. The transaction interface forms a dispatcher message control block and places it into the scheduler/dispatcher queue to initiate the task. If there are no other message control blocks in the queue particular for the called task, the called task is immediately started. Otherwise, the message control block waits in the queue to eventually be operated on.

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