公开(公告)号：JP2003202981A

公开(公告)日：2003-07-18

申请号：JP2002354116

申请日：2002-12-05

Applicant: ST MICROELECTRONICS INC

Inventor： HUANG LUN BIN

IPC: G06F7/02 ,  G06F9/34 ,  G06F12/08

Abstract: PROBLEM TO BE SOLVED: To provide an address range checking circuit that does not require a large comparator circuit. SOLUTION: This address range checking circuit is capable of determining if a target address A (M: 0) is within an address space having 2N address locations beginning at a base address location B (M: 0). The address range checking circuit does not require a large comparator circuit, and accordingly, can quickly operate in comparison with the conventional technology. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2001356905A

公开(公告)日：2001-12-26

申请号：JP2001130880

申请日：2001-04-27

Applicant: ST MICROELECTRONICS INC

Inventor： RICHARDSON NICHOLAS J ,  HUANG LUN BIN

IPC: G06F9/30 ,  G06F9/38

Abstract: PROBLEM TO BE SOLVED: To provide a pipeline processor based on a register stack capable of handling data dependency without causing sacrifice on performance. SOLUTION: This data processor is provided with the register stack having plural registers for architecture to store operands to be required by instructions to be executed by the data processor. An instruction execution pipeline having N processing stages is further included and each processing stage executes one of plural execution steps related to pending instructions under execution by the instruction execution pipeline. At least one mapping register related to at least one of the N processing stages is further arranged and stores mapping data which can be used to determine a physical register in relation to a stack register for architecture accessed by the pending instruction.

公开(公告)号：DE60311631D1

公开(公告)日：2007-03-22

申请号：DE60311631

申请日：2003-12-11

Applicant: ST MICROELECTRONICS INC

Inventor： HUANG LUN BIN ,  RICHARDSON NICHOLAS JULIAN ,  RAJGOPAL SURESH

IPC: H04L12/56

Abstract: For use in a pipeline network search engine of a router, a path compression optimization system and method is disclosed for eliminating single entry trie tables. The system embeds in a parent trie table (1) path compression patterns that comprise common prefix bits of a data packet and (2) skip counts that indicate the length of the path compression patterns. The network search engine utilizes the path compression patterns and the skip counts to eliminate single entry trie tables from a data structure. Each path compression pattern is processed one stride at a time in subsequent pipeline stages of the network search engine. The elimination of unnecessary single entry trie tables reduces memory space, power consumption, and the number of memory accesses that are necessary to traverse the data structure.