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    NOISE SHAPED INTERPOLATOR AND DECIMATOR APPARATUS AND METHOD
    1.
    发明申请
    NOISE SHAPED INTERPOLATOR AND DECIMATOR APPARATUS AND METHOD 审中-公开
    噪声形状的插入器和分离器装置和方法

    公开(公告)号：WO2005015752A8

    公开(公告)日：2005-07-07

    申请号：PCT/US2004025323

    申请日：2004-08-04

    Applicant: ST MICROELECTRONICS INC

    Inventor： NORSWORTHY STEVEN R ,  REDGRAVE JASON RUPERT

    IPC: H03H17/06 ,  H04B20060101 ,  H04L27/10

    CPC classification number: H03H17/0628 ,  G06F5/14 ,  G06F2205/061 ,  H03H17/0614

    Abstract: Improved interpolator (1304) and decimator (1324) apparatus and methods, including the addition of an elastic storage element (192) comprises a FIFO which advantageously allows short term variation in sample clocks to be absorbed, and also provides a feedback mechanism for controlling a delta-sigma modulated modulo-N counter based sample clock generator. The elastic element combined with a delta-sigma modulator and counter creates a noise-shaped frequency lock loop without additional components, resulting in a much simplified imterpolator and decimator.

    Abstract translation: 包括添加弹性存储元件（192）的改进的内插器（1304）和抽取器（1324）设备和方法包括有利地允许吸收采样时钟中的短期变化的FIFO，并且还提供用于控制 Δ-Σ调制的基于模N计数器的采样时钟发生器。 与delta-sigma调制器和计数器组合在一起的弹性元件创建了一个噪音形状的频率锁定环，无需额外的元件，从而得到简化的插入器和抽取器。

    VARIABLE CODER APPARATUS FOR RESONANT POWER CONVERSION AND METHOD
    3.
    发明申请
    VARIABLE CODER APPARATUS FOR RESONANT POWER CONVERSION AND METHOD 审中-公开
    用于谐振功率转换和方法的变量编码器装置

    公开(公告)号：WO2005015746A3

    公开(公告)日：2005-05-19

    申请号：PCT/US2004025223

    申请日：2004-08-04

    Applicant: ST MICROELECTRONICS INC

    Inventor： NORSWORTHY STEVEN R ,  REDGRAVE JASON RUPERT

    IPC: H03M20060101 ,  H03M3/00 ,  H03M3/02 ,  H04B14/06 ,  H04L25/49

    CPC classification number: H03M3/392 ,  H03M3/394 ,  H03M3/424 ,  H03M3/448 ,  H03M3/454 ,  H03M3/498

    Abstract: A noise-shaping coder with variable or reconfigurable characteristics is disclosed. In one exemplary embodiment, an improved apparatus for signal modulation is disclosed. The apparatus (see figure 1) generally comprises a noise-shaping coder having programmable coefficients, (see figure 1, CSEL), programmable coder order (see figure 1, MSEL), programmable oversampling frequency (see figure 1, CKEN), and/or programmable dither (see figure 1, D). In a second exemplary embodiment, an improved method for implementing noise shaping coding is disclosed. The apparatus generally compromises a means for switching from one order coder to another order coder, as well as switching oversampling frequency.

    Abstract translation: 公开了具有可变或可重新配置特性的噪声整形编码器。 在一个示例性实施例中，公开了一种用于信号调制的改进装置。 该装置（见图1）通常包括具有可编程系数（参见图1，CSEL），可编程编码器顺序（见图1，MSEL），可编程过采样频率（见图1，CKEN）的噪声整形编码器和/ 或可编程抖动（见图1，D）。 在第二示例性实施例中，公开了一种用于实现噪声整形编码的改进方法。 该装置通常损害用于从一个订单编码器切换到另一个订单编码器的装置以及切换过采样频率。

    NOISE SHAPED INTERPOLATOR AND DECIMATOR APPARATUS AND METHOD
    4.
    发明申请
    NOISE SHAPED INTERPOLATOR AND DECIMATOR APPARATUS AND METHOD 审中-公开
    噪声形状的插值器和减法器装置和方法

    公开(公告)号：WO2005015752A3

    公开(公告)日：2005-03-24

    申请号：PCT/US2004025323

    申请日：2004-08-04

    Applicant: ST MICROELECTRONICS INC

    Inventor： NORSWORTHY STEVEN R ,  REDGRAVE JASON RUPERT

    IPC: H03H17/06 ,  H04B20060101 ,  H04L27/10

    CPC classification number: H03H17/0628 ,  G06F5/14 ,  G06F2205/061 ,  H03H17/0614

    Abstract: Improved interpolator (1304) and decimator (1324) apparatus and methods, including the addition of an elastic storage element (192) comprises a FIFO which advantageously allows short term variation in sample clocks to be absorbed, and also provides a feedback mechanism for controlling a delta-sigma modulated modulo-N counter based sample clock generator. The elastic element combined with a delta-sigma modulator and counter creates a noise-shaped frequency lock loop without additional components, resulting in a much simplified imterpolator and decimator.

    Abstract translation: 改进的内插器（1304）和抽取器（1324）的装置和方法，包括添加弹性存储元件（192）包括有利地允许采样时钟的短期变化被吸收的FIFO，并且还提供用于控制 delta-sigma调制模N计数器采样时钟发生器。 与Δ-Σ调制器和计数器组合的弹性元件产生噪声形式的频率锁定环，而没有额外的组件，导致了非常简化的仿真器和抽取器。

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