公开(公告)号：JP2002007116A

公开(公告)日：2002-01-11

申请号：JP2001164895

申请日：2001-05-31

Applicant: ST MICROELECTRONICS INC

Inventor： PROTIP ROY

IPC: G06F9/38

Abstract: PROBLEM TO BE SOLVED: To increase an instruction dispatch speed in a super-scalar microprocessor-equipped with an out-of-order instruction rack. SOLUTION: This microprocessor is provided with plural resources for executing an instruction and an out-of-order instruction rack for tracking the priority/ age of the instruction. The instruction rack is provided with an instruction pool equipped with plural slots for storing the respective instructions and an instruction age tracker for storing a matrix constituted of lines and columns in logical states related with the relative ages of the instructions. The applied intra-column and intra-line logical states of the matrix are related with the respective slots of the instruction pool.