公开(公告)号：JP2002109874A

公开(公告)日：2002-04-12

申请号：JP2001220160

申请日：2001-07-19

Applicant: ST MICROELECTRONICS INC

Inventor： SAFI ROOZBEH

IPC: G11C7/00 ,  G06F5/06 ,  G06F5/12 ,  G06F5/14 ,  G06F12/06

Abstract: PROBLEM TO BE SOLVED: To provide an improved technique deciding the number of empty memory positions in a FIFO memory device. SOLUTION: This FIFO memory device is provided with plural pieces of memory positions having sequential binary addresses, a write address pointer for sequentially making access to the memory positions for writing the data, and a read address pointer for sequentially making access to the memory positions for reading the data. According to this invention, an inverted write binary address of the write address pointer is added to the read binary address of the read address pointer, and 1 is added thereto, and also the most significant bit(MSB) is destroyed to decide the number of the empty memory positions.