METHOD AND SYSTEM TO VERIFY THE RELIABILITY OF ELECTRONIC DEVICES
    1.
    发明申请
    METHOD AND SYSTEM TO VERIFY THE RELIABILITY OF ELECTRONIC DEVICES 审中-公开
    验证电子设备可靠性的方法和系统

    公开(公告)号:WO2010076687A1

    公开(公告)日:2010-07-08

    申请号:PCT/IB2009/055359

    申请日:2009-11-26

    Inventor: RICCI, Raffaele

    CPC classification number: G01R31/002 G01R31/2849

    Abstract: In order to verify robustness in regard to electrical overstresses of an electronic circuit under test (DUT), the latter is exposed to electrical overstresses (12, 14), and the behaviour thereof following upon exposure to said electrical overstresses is monitored (18). Moreover, the electrical overstress is applied to the electronic circuit (DUT) when the electronic circuit (DUT) is in its normal applicational conditions of operation. In particular, there is envisaged both the testing of the electronic circuit (DUT) in dynamic conditions by causing it to be traversed by the currents that characterize operation thereof and by exposing at least one supply line (20) of said electronic circuit under test (DUT) to electrical overstresses and the testing of said electronic circuit under test (DUT) in static conditions, without causing it to be traversed by the currents that characterize operation thereof and by exposing to electrical overstresses both the supply (20) and the input and/or output lines of said electronic circuit under test (DUT). The device (14) for generating the overstresses can be mounted on a circuit board (12), which can be coupled as daughter board to a mother board (10), on which the electronic circuit under test (DUT) is mounted.

    Abstract translation: 为了验证被测电子电路(DUT)的电应力的鲁棒性,后者被暴露于电过压(12,14),并且在暴露于所述电过应力之后监视其行为(18)。 此外,当电子电路(DUT)处于其正常的操作条件下时,电应力施加到电子电路(DUT)。 特别地,设想在动态条件下通过使其由表征其操作的电流穿过电子电路(DUT)并且通过暴露所测试的所述电子电路的至少一个供应线(20)来测试电子电路(DUT) DUT)在静态条件下进行电过载和测试所测试的被测电子电路(DUT),而不会使其被表征其操作的电流穿过,并暴露于对电源(20)和输入端的电过载 /或被测电子电路的输出线(DUT)。 用于产生过应力的装置(14)可以安装在电路板(12)上,该电路板可以作为子板耦合到母板(10),母板(10)上安装有被测电子电路(DUT)。

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