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公开(公告)号：EP1032131A3
公开(公告)日：2004-11-10
申请号：EP00301254.9
申请日：2000-02-17
Applicant: STMicroelectronics, Inc.
Inventor： Pakriswamy, Elango
Abstract: An H-bridge circuit (100) uses NMOS transistors for upper (125,165) and lower (145,185) sets of transistors. An inductive head (190) is coupled between the terminals (135,175) of the transistors. When a logic signal is received, one of the upper transistors (125,165) is driven responsive to the logic signal. A corresponding lower transistor (145,185) is also driven, forcing current through the inductive head in a first direction. The driving circuit (130,170) for the lower transistors (145,185) includes a programmable circuit (200) structured to capacitively couple the output (250) of the driving circuit to a pull-up voltage, thereby allowing the current forced through the inductive head to be maximized for optimum data transfer. Within the programmable voltage boost circuit are several logic gates (210,220,230), each coupled to a capacitor (216,226,236) of differing value. The inductive head is tested to determine the capacitance value to be coupled to the lower driving transistors. Codes are stored on the chip that identify the corresponding logic gates which are enabled when the H-bridge circuit is operational. The boosted driving circuits quickly change the direction of the flux through the inductive head.
Abstract translation: H桥电路（100）使用用于上（125,165）和下（145,185）组晶体管的NMOS晶体管。 感应头（190）耦合在晶体管的端子（135,175）之间。 当接收到逻辑信号时，响应于逻辑信号驱动上晶体管（125,165）中的一个。 相应的下晶体管（145,185）也被驱动，迫使电流在第一方向上通过感应头。 用于下部晶体管（145,185）的驱动电路（130,170）包括可编程电路（200），其被构造为将驱动电路的输出（250）电容耦合到上拉电压，由此允许强制通过感应头的电流 最大化数据传输。 在可编程升压电路内有几个逻辑门（210,220,230），每个都连接到不同值的电容器（216,226,236）。 测试感应头以确定要耦合到较低驱动晶体管的电容值。 代码存储在芯片上，用于识别H桥电路工作时使能的相应逻辑门。 升压驱动电路迅速改变通过感应磁头的磁通的方向。
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Patent Agency Ranking
公开(公告)号：EP1032131A2
公开(公告)日：2000-08-30
申请号：EP00301254.9
申请日：2000-02-17
Applicant: STMicroelectronics, Inc.
Inventor： Pakriswamy, Elango
Abstract: An H-bridge circuit (100) uses NMOS transistors for upper (125,165) and lower (145,185) sets of transistors. An inductive head (190) is coupled between the terminals (135,175) of the transistors. When a logic signal is received, one of the upper transistors (125,165) is driven responsive to the logic signal. A corresponding lower transistor (145,185) is also driven, forcing current through the inductive head in a first direction. The driving circuit (130,170) for the lower transistors (145,185) includes a programmable circuit (200) structured to capacitively couple the output (250) of the driving circuit to a pull-up voltage, thereby allowing the current forced through the inductive head to be maximized for optimum data transfer. Within the programmable voltage boost circuit are several logic gates (210,220,230), each coupled to a capacitor (216,226,236) of differing value. The inductive head is tested to determine the capacitance value to be coupled to the lower driving transistors. Codes are stored on the chip that identify the corresponding logic gates which are enabled when the H-bridge circuit is operational. The boosted driving circuits quickly change the direction of the flux through the inductive head.
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3.发明公开
公开(公告)号：EP1083550A2
公开(公告)日：2001-03-14
申请号：EP00307519.9
申请日：2000-08-31
Applicant: STMicroelectronics, Inc.
Inventor： Patti, Giuseppe , Alini, Roberto , Pakriswamy, Elango
Abstract: A circuit (102,103) for controlling the write head (101) of a magnetic disk storage device includes a pull-up device (104) for selectively providing a current to the write head and a current sink circuit (106) selectively activated to draw current from the write head. A bootstrap circuit (108) is coupled to the current sink circuit. When reversing the direction of current flow through the write head from a first direction to the write head to a second direction from the write head terminal, the bootstrap circuit and the current sink circuit are activated to rapidly draw current from the write head. When the current in the write head nears and/or slightly surpasses the desired destination level, the bootstrap circuit is deactivated.
Abstract translation: 一种用于控制磁盘存储装置的写入头（101）的电路（102,103）包括用于选择性地提供电流，以写头和一个电流吸收电路（106）的上拉设备（104）选择性地激活以汲取电流 从写头。 自举电路（108）被耦合到所述电流宿电路。 倒车时电流流过写入头从第一方向到写入头从写头端的第二方向的方向上，自举电路和所述电流宿电路被激活以快速绘制从写入头的电流。 当在写头的当前接近和/或略优于期望的目的地级，自举电路被停用。
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公开(公告)号：EP1032130A3
公开(公告)日：2004-11-10
申请号：EP00301253.1
申请日：2000-02-17
Applicant: STMicroelectronics, Inc.
Inventor： Pakriswamy, Elango
Abstract: An H-bridge circuit (100) uses NMOS transistors for both the upper (125,165) and lower (145,185) sets of transistors. An inductive head (190) is coupled between the terminals (135,175) of the transistors. When a logic signal is received, it is boosted with a circuit (110,150) including a capacitor (112,152) and is used to drive one of the upper transistors (125,165). The upper transistor (125) selected to be driven is responsive to the logic signal (X). A corresponding lower transistor (185) is also driven, forcing current through the inductive head in a first direction. When the logic signal is received that is the complement (X) of the first logic signal, the other upper (165) and lower (145) transistors turn on, thereby driving current through the inductive head in the other direction. Transistors in the H-bridge circuit are NMOS transistors and boosted driving circuits quickly change the direction of the flux through the inductive head.
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5.发明公开
公开(公告)号：EP1083550A3
公开(公告)日：2005-05-18
申请号：EP00307519.9
申请日：2000-08-31
Applicant: STMicroelectronics, Inc.
Inventor： Patti, Giuseppe , Alini, Roberto , Pakriswamy, Elango
Abstract: A circuit (102,103) for controlling the write head (101) of a magnetic disk storage device includes a pull-up device (104) for selectively providing a current to the write head and a current sink circuit (106) selectively activated to draw current from the write head. A bootstrap circuit (108) is coupled to the current sink circuit. When reversing the direction of current flow through the write head from a first direction to the write head to a second direction from the write head terminal, the bootstrap circuit and the current sink circuit are activated to rapidly draw current from the write head. When the current in the write head nears and/or slightly surpasses the desired destination level, the bootstrap circuit is deactivated.
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公开(公告)号：EP1032130A2
公开(公告)日：2000-08-30
申请号：EP00301253.1
申请日：2000-02-17
Applicant: STMicroelectronics, Inc.
Inventor： Pakriswamy, Elango
Abstract: An H-bridge circuit (100) uses NMOS transistors for both the upper (125,165) and lower (145,185) sets of transistors. An inductive head (190) is coupled between the terminals (135,175) of the transistors. When a logic signal is received, it is boosted with a circuit (110,150) including a capacitor (112,152) and is used to drive one of the upper transistors (125,165). The upper transistor (125) selected to be driven is responsive to the logic signal (X). A corresponding lower transistor (185) is also driven, forcing current through the inductive head in a first direction. When the logic signal is received that is the complement ( X ¯ ) of the first logic signal, the other upper (165) and lower (145) transistors turn on, thereby driving current through the inductive head in the other direction. Transistors in the H-bridge circuit are NMOS transistors and boosted driving circuits quickly change the direction of the flux through the inductive head.
Abstract translation: H桥电路（100）使用NMOS晶体管用于上（125,165）和下（145,185）组晶体管。 感应头（190）耦合在晶体管的端子（135,175）之间。 当接收到逻辑信号时，它被包括电容器（112,152）的电路（110,150）升压，并被用于驱动上晶体管（125,165）中的一个。 被选择为被驱动的上晶体管（125）响应于逻辑信号（X）。 相应的下晶体管（185）也被驱动，迫使电流在第一方向上通过感应头。 当接收到作为第一逻辑信号的补码（X）的逻辑信号时，其他上（165）和下（145）晶体管导通，从而以另一方向驱动电流通过电感磁头。 H桥电路中的晶体管是NMOS晶体管，升压驱动电路迅速改变通过感应头的磁通的方向。
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