公开(公告)号：EP3026696A1

公开(公告)日：2016-06-01

申请号：EP15185529.3

申请日：2015-09-16

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics, Inc.

Inventor： FONTANA, Fulvio Vittorio ,  TALLEDO, Jefferson

IPC: H01L21/56 ,  B81B7/00 ,  B81C1/00 ,  H01L23/498

CPC classification number: G01L19/148 ,  B81B7/0045 ,  B81C1/00325 ,  H01L21/50 ,  H01L23/057 ,  H01L23/49575 ,  H01L23/49861 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2924/00014

Abstract: A surface mounting device (50) has one body (6) of semiconductor material such as an ASIC, and a package surrounding the body. The package has a base region (15) carrying the body, a cap (20) and contact terminals (3). The base region (15) has a Young's modulus lower than 5 MPa. For forming the device, the body (6) is attached to a supporting frame (1) including contact terminals (3) and a die pad (2), separated by cavities; bonding wires (14) are soldered to the body (6) and to the contact terminals (3); an elastic material is molded so as to surround at least in part lateral sides of the body (6), fill the cavities of the supporting frame (1) and cover the ends of the bonding wires (14) on the contact terminals; and a cap (20) is fixed to the base region (15). The die pad (2) is then etched away.

Abstract translation: 一种表面安装装置（50）具有半导体材料的一个本体（6）：如ASIC，和围绕所述本体的封装件。 所述封装具有承载体上的基极区域（15），盖（20）和接触端子（3）。 基极区域（15）具有的杨氏模量小于5兆帕以下。 为了形成器件，所述主体（6）被附连到支撑框架（1）包括接触端子（3）和所述衬垫（2）中，由空腔分开; 接合线（14）被焊接到所述主体（6）和所述接触端子（3）; 弹性材料被模制，以便至少在所述主体的一部分的横向侧（6），填充所述支撑框架（1）的空腔中并覆盖在接触端子的键合线（14）的端部以包围; 和一个盖（20）被固定到所述基极区域（15）。 所述衬垫（2）随后蚀刻掉。

公开(公告)号：EP4235772A1

公开(公告)日：2023-08-30

申请号：EP23157443.5

申请日：2023-02-20

Applicant: STMicroelectronics, Inc.

Inventor： TALLEDO, Jefferson

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/433

Abstract: The present disclosure is directed to a package having a die on a die pad that has a first portion and a second portion, the second portion being larger than the first portion in a first direction. The package includes a plurality of leads, where at least a first lead has a first surface coplanar with a first, lower surface of the first portion of the die pad. The first lead having a second surface that is transverse to the first surface of the first lead. The second surface being an external surface of the lead and package. The second portion of the die pad being an extension that is overlapping the first lead.

公开(公告)号：EP4293716A1

公开(公告)日：2023-12-20

申请号：EP23178319.2

申请日：2023-06-09

Applicant: STMicroelectronics, Inc.

Inventor： TALLEDO, Jefferson

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/00

Abstract: The present disclosure is directed to a thin substrate package and a lead frame method of fabricating the semiconductor package (100). The semiconductor package includes a first lead frame portion (109) and a second lead frame portion (104). A substrate (102) is positioned in a center opening (118) between the first lead frame portion and the second lead frame portion, the substrate having a thickness less than or equal to 0.10-millimeters (mm). A first die (110) having a plurality of wires is positioned on the substrate by an adhesive (108). A molding compound (116) covers the first and second lead frame portions, the substrate, and the first die.