Abstract:
The present invention is a smart card device that can be debugged and software developed using at least one interrupt endpoint without adding an additional port. At least one memory stores a debug monitor program and instructions for completing smart card transactions. An interface is defined by a plurality of communication pipes and respective endpoints, including at least one interrupt endpoint. A microprocessor is operatively connected to the interface and memory and configures the interrupt endpoint as a debug port for debugging and software development using the debug monitor program.
Abstract:
A system and method simulates a universal serial bus (USE) smart card device connected to a USB host device for development and debugging and includes a computer simulator and USB host device with host controller operatively connected along a communications link with the computer simulator for transmitting or receiving data packets to or from the computer simulator. A microcontroller is located between the computer simulator and USB host device and translates the data packets into a USB protocol to be used by the USB host device and defined by the computer simulator.
Abstract:
A system and method simulates a universal serial bus (USE) smart card device connected to a USB host device for development and debugging and includes a computer simulator and USB host device with host controller operatively connected along a communications link with the computer simulator for transmitting or receiving data packets to or from the computer simulator. A microcontroller is located between the computer simulator and USB host device and translates the data packets into a USB protocol to be used by the USB host device and defined by the computer simulator.
Abstract:
An integrated circuit (11) for use with smart card and method are operative in both an ISO mode in accordance with the International Standards Organization 7816 (ISO 7816) protocol, and a non-ISO mode in accordance with a non-ISO protocol. The dual-mode integrated circuit includes a microprocessor (14) and switching block (16). An external interface (12) is connected to the switching block (16) and comprises an ISO port operative for communicating in an ISO mode when the ISO mode is detected and a non-ISO port operative for communicating in a non-ISO mode when a non-ISO mode is detected. The ISO port is configured to allow debugging and/or software development through a serial interface in a non-ISO mode and the non-ISO port is configured to allow debugging and/or software development through the non-ISO port in an ISO mode.
Abstract:
An integrated circuit is used in a smart card device and includes at least one memory for storing mass storage data. The smart card device communicates through a chip/smart card interface (CCID) in accordance with the International Standards Organization 7816 (ISO 7816) protocol and a mass storage interface. A microprocessor is connected to the at least one memory and operative for initiating communications with the host using a CCID interface and transferring mass storage data using a mass storage interface.
Abstract:
A system and method for transmitting and receiving secure e-mails is disclosed. A smart card device stores both private and public keys for an encryption algorithm. The smart card device is preferably a USB smart card device and interfaces a host having a client e-mail program. E-mails are transferred to and/or from the client e-mail program and e-mail server via the smart card while decrypting and encrypting any transmitted and/or received e-mails within the smart card device. The smart card device stores an IP address for an e-mail server. A Simple Mail Transfer Protocol outgoing parameter is set from the client e-mail program to an IP address for the smart card device.
Abstract:
An integrated circuit is used in a smart card device and includes at least one memory for storing mass storage data. The smart card device communicates through a chip/smart card interface (CCID) in accordance with the International Standards Organization 7816 (ISO 7816) protocol and a mass storage interface. A microprocessor is connected to the at least one memory and operative for initiating communications with the host using a CCID interface and transferring mass storage data using a mass storage interface.