公开(公告)号：EP1416393A1

公开(公告)日：2004-05-06

申请号：EP02257603.7

申请日：2002-11-01

Applicant: STMicroelectronics, Ltd. ,  STMicroelectronics S.r.l.

Inventor： Homewood, Mark Owen ,  Borneo, Antonio Maria

IPC: G06F13/38

CPC classification number: G06F13/385

Abstract: A processing system for accessing first and second data types. The first data type is data supplied from a peripheral and the second data type is randomly accessible data held in a data memory. The processing system comprises a processor for executing instructions; a stream register unit connected to supply data from the peripheral to the processor; a FIFO connected to receive data from the peripheral and connected to the stream register unit by a communication path, along which the said data can be supplied from the FIFO to the stream register unit; and a memory bus connected between the data memory and the processor, across which the processor can access the randomly accessible data.

Abstract translation: 通过通信信道（8）连接到流注册单元（5）的先​​进先出（FIFO）存储器（16）从外设接收数据。 数据通过通道从存储器提供给流寄存器单元。 存储器总线（3）连接在数据存储器和处理器之间，处理器通过该存储器总线访问随机访问的数据。 还包括以下独立权利要求：（1）处理单位; （2）流数据处理系统; 和（3）流注册。

公开(公告)号：EP1416393B1

公开(公告)日：2008-08-13

申请号：EP02257603.7

申请日：2002-11-01

Applicant: STMicroelectronics Limited ,  STMicroelectronics S.r.l.

Inventor： Homewood, Mark Owen ,  Borneo, Antonio Maria

IPC: G06F13/38

CPC classification number: G06F13/385