Abstract:
A method is described for reducing delays in an analogue simulation model of a hardware circuit. The method comprises the steps of stimulating via an input an output of said analogue model, said output and said input having a relatively high resistance therebetween and applying a pulse to a relatively low resistance, whereby when said pulse is applied to the relatively low resistance, the input is connected to said output via the relatively low resistance so that the time constant of the circuit is reduced.
Abstract:
A method is described for verifying the output from an analogue simulation model of a hardware circuit. The method comprises the steps of stimulating the analogue model by applying a preselected voltage to an input pin of the analogue model, driving one or more selected output pins of the analogue model with a test voltage having a selected drive strength different from an expected output drive strength, measuring the output voltage of each output pin, comparing the measured output voltage and the expected output voltage and responsive to said comparison, providing a verifying output if the measured and expected voltages are not in contradiction.
Abstract:
A method is described for converting a data set for use with a digital model of a hardware cell into an expanded data set for use with an analogue model of the hardware cell. The method comprises the steps of determining the signal required to drive one or more pins of said analogue model by analysing whether the signals used in said digital model are in a first category or a second category, said first category containing relatively simple signals and said second category containing relatively complex signals, and providing the signal required for the one or more pins in the analogue model in dependence on said analysis.