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Patent Agency Ranking
公开(公告)号：EP1081498A1
公开(公告)日：2001-03-07
申请号：EP00302835.4
申请日：2000-04-04
Applicant: STMicroelectronics Limited
IPC: G01R31/3185
CPC classification number: G01R31/318541
Abstract: A circuit is described which allows a scan latch to selectively pass inputs derived from either of two test outputs, e.g. scan test and built-in self-test data, but which does not apply an added delay to a data path when this is instead selected.
Abstract translation: 描述了一种电路，其允许扫描锁存器选择性地通过来自两个测试输出之一的输入，例如， 扫描测试和内置的自测数据，但在选择此选项时不会对数据路径添加延迟。
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公开(公告)号：EP1081498B1
公开(公告)日：2006-08-02
申请号：EP00302835.4
申请日：2000-04-04
Applicant: STMicroelectronics Limited
IPC: G01R31/3185
CPC classification number: G01R31/318541
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公开(公告)号：EP1079524B1
公开(公告)日：2006-08-16
申请号：EP00303948.4
申请日：2000-05-10
Applicant: STMicroelectronics Limited
IPC: H03K3/356 , H03K19/0185
CPC classification number: H03K3/356121 , H03K3/356191
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公开(公告)号：EP1079294B1
公开(公告)日：2004-09-22
申请号：EP00303967.4
申请日：2000-05-11
Applicant: STMicroelectronics Limited
IPC: G05F3/26
CPC classification number: G05F3/262
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公开(公告)号：EP1079294A1
公开(公告)日：2001-02-28
申请号：EP00303967.4
申请日：2000-05-11
Applicant: STMicroelectronics Limited
IPC: G05F3/26
CPC classification number: G05F3/262
Abstract: An integrated current reference circuit uses two current mirror circuits, in which one of the transistors of one of the current mirrors has a back gate connection to the power rail, the drain-source path being connected to the power rail via a voltage offset element.
Abstract translation: 集成电流参考电路使用两个电流镜电路，其中一个电流镜的一个晶体管具有到电源轨的背栅连接，漏源通路经由电压偏移元件连接到电源轨。
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