公开(公告)号：EP1231608A1

公开(公告)日：2002-08-14

申请号：EP01301092.1

申请日：2001-02-07

Applicant: STMicroelectronics Limited

Inventor： Firth, Steven ,  Barnes, William

IPC: G11C29/00

CPC classification number: G11C29/14 ,  G11C29/48

Abstract: Test circuitry for testing an integrated circuit, the integrated circuit being configurable to accept input data from stimulus scan cells and to provide output data to response scan cells, the test circuitry including stimulus circuitry for providing test data to the integrated circuit; input selection means operable to control which of the test data and the input data are received at the integrated circuit; capture circuitry for capturing output data from the integrated circuit and generating response data; output selection means operable to select which of the output data and the response data are received by the response scan cells.

Abstract translation: 用于测试集成电路的测试电路，所述集成电路可配置为接受来自激励扫描单元的输入数据，并向响应扫描单元提供输出数据，所述测试电路包括用于向所述集成电路提供测试数据的激励电路; 输入选择装置，用于控制在集成电路处接收的测试数据和输入数据中的哪一个; 用于从集成电路捕获输出数据并产生响应数据的捕获电路; 输出选择装置，用于选择响应扫描单元接收哪一个输出数据和响应数据。