公开(公告)号：EP1367484B1

公开(公告)日：2013-07-24

申请号：EP02253869.8

申请日：2002-05-31

Applicant: STMicroelectronics Limited

Inventor： Hussain, Zahid

IPC: G06F9/38

CPC classification number: G06F9/3853

公开(公告)号：EP1306810A1

公开(公告)日：2003-05-02

申请号：EP01309059.2

申请日：2001-10-25

Applicant: STMicroelectronics Limited

Inventor： Hussain, Zahid ,  Simpson, Robert

IPC: G06T15/40

CPC classification number: G06T15/405

Abstract: A method of rendering a plurality of triangles into a colour buffer defined by a plurality of pixel locations, utilising a triangle identification buffer and a depth buffer. A relatively unique identifier is assigned to each of the triangles to be rendered. Before colour and texture mapping, each triangle is depth compared on a per pixel basis. If a pixel of a current triangle is in front of any existing pixel at that point, the current triangles identifier is over-written into a triangle identification buffer. Colour texture data is only retrieved for each triangle that appears in the identification buffer once all triangles have been compared.

Abstract translation: 一种利用三角形识别缓冲器和深度缓冲器将多个三角形呈现为由多个像素位置定义的彩色缓冲器的方法。 将相对唯一的标识符分配给要渲染的每个三角形。 在颜色和纹理映射之前，每个三角形是以每像素为基础的深度比较。 如果当前三角形的像素在该点的任何现有像素的前面，则当前三角形标识符被重写成三角形识别缓冲区。 一旦所有三角形都进行了比较，颜色纹理数据才会被检索出出现在识别缓冲区中的每个三角形。

公开(公告)号：EP1367485B1

公开(公告)日：2012-10-31

申请号：EP02253870.6

申请日：2002-05-31

Applicant: STMicroelectronics Limited

Inventor： Hussain, Zahid

IPC: G06F9/38

CPC classification number: G06F9/3853 ,  G06F9/3875

公开(公告)号：EP1306811A1

公开(公告)日：2003-05-02

申请号：EP02257324.0

申请日：2002-10-22

Applicant: STMicroelectronics Limited

Inventor： Hussain, Zahid ,  Simpson, Robert

IPC: G06T15/40

CPC classification number: G06T15/405

Abstract: A method of rendering a plurality of triangles into a colour buffer defined by a plurality of pixel locations, utilising a triangle identification buffer and a depth buffer. A relatively unique identifier is assigned to each of the triangles to be rendered. Before colour and texture mapping, each triangle is depth compared on a per pixel basis. If a pixel of a current triangle is in front of any existing pixel at that point, the current triangles identifier is over written into a triangle identification buffer. Colour texture data is only retrieved for each triangle that appears in the identification buffer once all triangles have been compared.

Abstract translation: 一种利用三角形识别缓冲器和深度缓冲器将多个三角形呈现为由多个像素位置定义的彩色缓冲器的方法。 将相对唯一的标识符分配给要渲染的每个三角形。 在颜色和纹理映射之前，每个三角形是以每像素为基础的深度比较。 如果当前三角形的像素在该点的任何现有像素的前面，则当前三角形标识符被写入三角形识别缓冲区。 一旦所有三角形都进行了比较，颜色纹理数据才会被检索出出现在识别缓冲区中的每个三角形。

公开(公告)号：EP1367485A1

公开(公告)日：2003-12-03

申请号：EP02253870.6

申请日：2002-05-31

Applicant: STMicroelectronics Limited

Inventor： Hussain, Zahid

IPC: G06F9/38

CPC classification number: G06F9/3853 ,  G06F9/3875

Abstract: A processor and a method for executing VLIW instructions using pipeline execution wherein each VLIW instruction consists of a plurality of instructions and wherein the pipeline consists of at least the following stages: first and second instruction fetch stages, a pre-decode stage, an instruction dispatch stage, first and second decoding stages, an execution stage and a write-back stage. During the first instruction fetch stage the number of outstanding instructions is determined where these outstanding instructions are from previous VLIW instructions that have not yet been issued for execution. During the second instruction fetch stage a comparison is performed on whether the number of outstanding instructions is less then the number of instructions in a VLIW instruction where if the number of outstanding instructions is less than the number of instructions in an instruction packet then the next VLIW instruction is fetched and the outstanding instructions are shifted and aligned with the fetched VLIW instruction. During the pre-decode stage determining which instructions in each VLIW instruction are to be issued and in the dispatch stage feeding said instructions not issued back to the first instruction fetch stage such that the processor is updated as to the number of outstanding instructions.

Abstract translation: 一种用于使用流水线执行来执行VLIW指令的处理器和方法，其中每个VLIW指令由多个指令组成，并且其中所述流水线至少包括以下阶段：第一和第二指令获取阶段，预解码阶段，指令调度 阶段，第一和第二解码阶段，执行阶段和回写阶段。 在第一指令获取阶段期间，确定这些未完成指令来自尚未被执行的先前VLIW指令的未完成指令的数量。 在第二指令获取阶段期间，对未完成指令的数量是否小于VLIW指令中的指令数量进行比较，其中如果未完成指令的数目小于指令分组中的指令数，则下一个VLIW 指令被取出，未完成的指令被移位并与获取的VLIW指令对齐。 在预解码阶段期间，确定将要发出每个VLIW指令中的哪些指令，并且在调度阶段中将所述指令馈送不发回到第一指令提取级，使得处理器被更新为未完成指令的数量。

公开(公告)号：EP1367484A1

公开(公告)日：2003-12-03

申请号：EP02253869.8

申请日：2002-05-31

Applicant: STMicroelectronics Limited

Inventor： Hussain, Zahid

IPC: G06F9/38

CPC classification number: G06F9/3853

Abstract: A processor and a method for executing VLIW instructions by firstly fetching a VLIW instruction and then identifying from option bits encoded in a first one of the instructions within the fetched VLIW instruction packet which, if any, of the remaining instructions within the VLIW instruction are to be executed in the same execution cycle as the first instruction. Finally, executing said first instruction and any said remaining instructions identified from the encoded option bits.

Abstract translation: 一种用于执行VLIW指令的处理器和方法，其首先取得VLIW指令，然后从所取得的VLIW指令分组中的第一个指令中编码的选项中识别出VLIW指令中剩余指令（如果有的话）是 以与第一条指令相同的执行周期执行。 最后，执行所述第一指令和从编码选项位标识的任何所述剩余指令。