Secure test arrangement
    1.
    发明公开
    Secure test arrangement 审中-公开
    Gesicherte Testanordnung

    公开(公告)号:EP1443338A1

    公开(公告)日:2004-08-04

    申请号:EP03250662.8

    申请日:2003-02-03

    CPC classification number: G01R31/31719 G01R31/318555

    Abstract: A port protection circuit, in particular for protecting a JTAG port, comprises logic gates which are switchable to allow the JTAG port to access scan chains or a Diagnostic Control Unit (DCU). The gating arrangement is controlled by a protection circuit that requires a private key to be input through the JTAG port to "unlock" a circuit so that the gating components allow connection between the JTAG port and scan chains or the DCU.

    Abstract translation: 特别是用于保护JTAG端口的端口保护电路包括可切换以允许JTAG端口访问扫描链的逻辑门或诊断控制单元(DCU)。 门控装置由保护电路控制,该保护电路需要通过JTAG端口输入私钥以“解锁”电路,使得门控组件允许JTAG端口与扫描链或DCU之间的连接。

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