公开(公告)号：EP1667009A1

公开(公告)日：2006-06-07

申请号：EP05111629.1

申请日：2005-12-02

Applicant: STMicroelectronics Pvt. Ltd

Inventor： Jaisinghani, Pooja ,  Nandy, Tapas

IPC: G06F1/28 ,  G06F1/26 ,  G01R19/165 ,  G11C16/30

CPC classification number: G01R19/16576 ,  G01R19/16538 ,  Y10T307/735 ,  Y10T307/74

Abstract: The present invention provides a supply identifier, which takes precise decision on the range of the external supply to manage a proper internal supply to the core of the IC by controlling a regulator or a switch connected to external supply. This supply identifier, defers the decision till everything that influence the decision settles after power-up, then makes a decision only once depending on the external supply range and switches itself off keeping the decision stored, to avoid noise induced wrong behavior and to reduce power consumption.

Abstract translation: 本发明提供了一种电源识别器，其通过控制连接到外部电源的调节器或开关来精确决定外部电源的范围，以管理适当的IC内核电源。 这个电源标识符将延迟决定，直到决定了所有影响决定的决定，然后根据外部电源范围决定一次，并自行切换以保持决策存储，避免噪声导致的错误行为并降低功耗 消费。

公开(公告)号：EP1667009B1

公开(公告)日：2007-11-14

申请号：EP05111629.1

申请日：2005-12-02

Applicant: STMicroelectronics Pvt. Ltd

Inventor： Jaisinghani, Pooja ,  Nandy, Tapas

IPC: G06F1/28 ,  G06F1/26 ,  G01R19/165 ,  G11C16/30

CPC classification number: G01R19/16576 ,  G01R19/16538 ,  Y10T307/735 ,  Y10T307/74

公开(公告)号：EP1303048A1

公开(公告)日：2003-04-16

申请号：EP02021533.1

申请日：2002-09-26

Applicant: STMicroelectronics Pvt. Ltd

Inventor： Nandy, Tapas

IPC: H03M1/38

CPC classification number: H03M1/0854 ,  H03M1/468 ,  H03M1/804

Abstract: This invention relates to an improved binary-weighted, switched-capacitor, charge-redistribution successive approximation Analog-to-Digital Converter (ADC) characterized in that it includes an adjusting mechanism for adding a charge corresponding to one-half of the Least Significant Bit (LSB) of said ADC to the charge stored in the switched capacitor array after the sampling phase of said ADC so as to provide a quantization error that is evenly distributed between +0.5 LSB and -0.5 LSB, without the need for any additional processing clock cycles.

Abstract translation: 一种改进的二进制加权，开关电容，电荷再分配的逐次逼近模拟 - 数字转换器（ADC）可以包括在调整机构，用于将电荷对应于所述ADC的所述至少显著位（LSB）的一半 存储在电容器阵列ADC的切换采样阶段之后其上的电荷。 这样做是为了提供一个量化误差也±0.5倍之间均匀分布的LSB，而无需任何附加的处理时钟周期。