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1.发明公开A minimal area integrated circuit implementation of a polyphase interpolation filter using coefficients symmetry 有权一个Polyphaseninterpolationsfilters的使用所述系数对称性以集成电路的最小空间要求执行
公开(公告)号：EP1630958A2
公开(公告)日：2006-03-01
申请号：EP05018679.0
申请日：2005-08-29
Applicant: STMicroelectronics Pvt. Ltd
Inventor： Bhuvanagiri, Aditha , Singh, Halvinder , Malik, Rakesh
IPC: H03H17/06
CPC classification number: H03H17/0275 , H03H17/0657
Abstract: A minimal area integrated circuit implementation of a polyphase interpolation filter using symmetry of coefficients for at least one channel of input data, comprising, an input interface block for synchronizing the input signal to a first internal clock signal; a memory block for providing multiple delayed output signals; a channel select multiplexer block selecting a channel in response to a first set of internal control signals; a multiplexer input interface block for outputting a selected plurality of signals for generating mirror image coefficient sets in response to a second set of internal control signals, a coefficient block for generating mirror image and/or symmetric coefficient sets, and to output a plurality of filtered signals , an output multiplexer block for performing selection, gain control and data width control on said plurality of filtered signals, an output register block for synchronization of filtered signal, and a control block to generate clock signals for realization of the filter and to delay between two channels to access a coefficient set, thereby minimizing hardware requirement of coefficient set implementation in a polyphase interpolation filter.
Abstract translation: 的最小面积集成电路实施方式使用系数的输入数据的至少一个信道，在输入接口块，包括用于同步输入信号到第一内部时钟信号的对称性的多相内插滤波器的; 用于提供多延迟输出信号的存储器块; 一信道选择复用器块选择响应于第一组内部控制信号的信道; 用于输出铃声复用器输入接口块的信号，用于响应于第二组内部控制信号的生成镜像系数集合，用于产生镜像和/或对称的系数组的系数块，并且输出的过滤的多个选择的多个 信号，以输出多路转换器块，用于执行选择，增益控制和数据宽度控制对所述多个经滤波的信号的输出寄存器块为滤波后的信号的同步，以及控制块，为实现滤波器的生成时钟信号，并延时之间 两个信道来访问的一组系数，从而最小化在一多相内插滤波器系数集合执行硬件要求。
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2.发明授权A minimal area integrated circuit implementation of a polyphase interpolation filter using coefficients symmetry 有权一个Polyphaseninterpolationsfilters的使用所述系数对称性以集成电路的最小空间要求执行
公开(公告)号：EP1630958B1
公开(公告)日：2010-06-23
申请号：EP05018679.0
申请日：2005-08-29
Applicant: STMicroelectronics Pvt. Ltd
Inventor： Bhuvanagiri, Aditha , Singh, Halvinder , Malik, Rakesh , Chawla, Nitin
CPC classification number: H03H17/0275 , H03H17/0657
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3.发明公开A minimal area integrated circuit implementation of a polyphase interpolation filter using coefficients symmetry 有权一个Polyphaseninterpolationsfilters的使用所述系数对称性以集成电路的最小空间要求执行
公开(公告)号：EP1630958A3
公开(公告)日：2007-03-07
申请号：EP05018679.0
申请日：2005-08-29
Applicant: STMicroelectronics Pvt. Ltd
Inventor： Bhuvanagiri, Aditha , Singh, Halvinder , Malik, Rakesh , Chawla, Nitin
CPC classification number: H03H17/0275 , H03H17/0657
Abstract: A minimal area integrated circuit implementation of a polyphase interpolation filter using symmetry of coefficients for at least one channel of input data, comprising, an input interface block for synchronizing the input signal to a first internal clock signal; a memory block for providing multiple delayed output signals; a channel select multiplexer block selecting a channel in response to a first set of internal control signals; a multiplexer input interface block for outputting a selected plurality of signals for generating mirror image coefficient sets in response to a second set of internal control signals, a coefficient block for generating mirror image and/or symmetric coefficient sets, and to output a plurality of filtered signals , an output multiplexer block for performing selection, gain control and data width control on said plurality of filtered signals, an output register block for synchronization of filtered signal, and a control block to generate clock signals for realization of the filter and to delay between two channels to access a coefficient set, thereby minimizing hardware requirement of coefficient set implementation in a polyphase interpolation filter.
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