公开(公告)号：EP1473644A3

公开(公告)日：2005-09-21

申请号：EP04009701.6

申请日：2004-04-23

Applicant: STMicroelectronics Pvt. Ltd

Inventor： Sharma, Sunil Kumar ,  Tomar, Ajay ,  Samanta, Dhabalendu

IPC: G06F17/50

CPC classification number: G06F17/5054

Abstract: The present invention provides an improved method for mapping a logic circuit to a plurality of interconnectable, programmable look up tables (LUT) elements comprising steps of, forming logic element groups including individual logic elements and/ or previously formed logic element groups that are capable of being accommodative with in the fanin and /or fanout capacity of a target LUT, mapping the formed logic element group to the target LUT, and repeating the process for forming logic element groups and mapping to target LUTs for the entire network in a manner that at each stage only the unapped logic element/elements and mapped logic element groups of the previous stage are considered for mapping.

公开(公告)号：EP1473644A2

公开(公告)日：2004-11-03

申请号：EP04009701.6

申请日：2004-04-23

Applicant: STMicroelectronics Pvt. Ltd

Inventor： Sharma, Sunil Kumar ,  Tomar, Ajay ,  Samanta, Dhabalendu

IPC: G06F17/50

CPC classification number: G06F17/5054

Abstract: The present invention provides an improved method for mapping a logic circuit to a plurality of interconnectable, programmable look up tables (LUT) elements comprising steps of, forming logic element groups including individual logic elements and/ or previously formed logic element groups that are capable of being accommodative with in the fanin and /or fanout capacity of a target LUT, mapping the formed logic element group to the target LUT, and repeating the process for forming logic element groups and mapping to target LUTs for the entire network in a manner that at each stage only the unapped logic element/elements and mapped logic element groups of the previous stage are considered for mapping.

Abstract translation: 对本发明的改进的方法提供了用于映射的逻辑电路，其包含的步骤可互相连接，可编程查找表（LUT）的元素的复数，形成逻辑元件组包括个别逻辑元件和/或先前形成的逻辑元件组也能够 为调节与所述扇入和/或所形成的逻辑元件群映射到所述目标LUT，并重复该过程以形成逻辑元件组和映射到目标的LUT用于以这样的方式在整个网络中的目标LUT的扇出能力做在 每个阶段仅unapped逻辑元件/元件和前级的映射逻辑元件组被认为是映射。

公开(公告)号：EP1510950A3

公开(公告)日：2005-09-21

申请号：EP04104132.8

申请日：2004-08-27

Applicant: STMicroelectronics Pvt. Ltd.

Inventor： Sharma, Sunil Kumar ,  Tomar, Ajay ,  Samanta, Dhabalendu

IPC: G06F17/50

CPC classification number: G06F17/5054

Abstract: An improved method for finding a maximum volume minimum cutset in a network of interconnected nodes, applicable to any system that can be reduced to such network including telecommunication network, traffic network, computer networks, layouts, hydraulic networks etc. According to the invention an equivalent network is derived by replacing all nodes other then source and sink by two interconnected nodes, a conventional method applying augmenting path algorithm identifies then a cutset. If the feasible cutset is not achieved than a reduced network is constructed by directly connecting the member nodes of identified cutset to the source node and repeating the above process for the reduce network until a feasible cutset is achieved.

公开(公告)号：EP1510950A2

公开(公告)日：2005-03-02

申请号：EP04104132.8

申请日：2004-08-27

Applicant: STMicroelectronics Pvt. Ltd.

Inventor： Sharma, Sunil Kumar ,  Tomar, Ajay ,  Samanta, Dhabalendu

IPC: G06F17/50

CPC classification number: G06F17/5054

Abstract: An improved method for finding a maximum volume minimum cutset in a network of interconnected nodes, applicable to any system that can be reduced to such network including telecommunication network, traffic network, computer networks, layouts, hydraulic networks etc. According to the invention an equivalent network is derived by replacing all nodes other then source and sink by two interconnected nodes, a conventional method applying augmenting path algorithm identifies then a cutset. If the feasible cutset is not achieved than a reduced network is constructed by directly connecting the member nodes of identified cutset to the source node and repeating the above process for the reduce network until a feasible cutset is achieved.

Abstract translation: 为互连节点的网络中找到的最大体积最小割集的改进的方法，可适用于任何系统也可以减少到寻求网络包括电信网络，交通网络，计算机网络，布局，液压网络等。据的等效发明 网络是由两个相互连接的节点替换其他所有节点然后源和宿衍生，应用增强路径算法的常规方法随后识别一个割集。 如果可行割集不大于减小的网络实现，是由鉴定割集的成员节点直接连接到源节点并重复上述处理，直到一个可行的割集实现所述减少网络构成。