公开(公告)号：EP1806751A1

公开(公告)日：2007-07-11

申请号：EP06127150.8

申请日：2006-12-22

Applicant: STMicroelectronics Pvt. Ltd.

Inventor： Kohli, Nishu ,  Bhargava, Mudit ,  Kumar, Shishir

IPC: G11C7/22 ,  G11C7/06 ,  G11C7/08

CPC classification number: G11C7/227 ,  G11C7/06 ,  G11C7/08 ,  G11C7/22 ,  G11C7/222 ,  G11C29/12015 ,  G11C29/14 ,  G11C29/50 ,  G11C29/50012

Abstract: A novel method for introducing delays in self timed memories is disclosed. In the proposed method, delays are introduced by introducing a capacitance on the path of signal to be delayed. The capacitances are realized by using idle lying metal layers in the circuit. The signal to be delayed is connected to these idle lying capacitances via programmable switches. The amount of delay introduced depends on the capacitance introduced in the path of signal, which in turn depends on state of the switches. The state of the switches is controlled by delay codes provided externally to the delay introducing circuitry. Since, in the proposed method, idle-lying metal capacitances are utilized, the circuit can be implemented using minimum amount of additional hardware. Also delay provided by the proposed circuitry is a function of memory cell spice characteristics and core parasitic capacitances.

Abstract translation: 公开了一种用于引入自定时存储器中的延迟的新方法。 在所提出的方法中，通过在要延迟的信号的路径上引入电容来引入延迟。 电容通过在电路中使用空闲的躺着金属层来实现。 要延迟的信号通过可编程开关连接到这些空闲的电平。 引入的延迟量取决于在信号路径中引入的电容，这又取决于开关的状态。 开关的状态由延迟引入电路外部提供的延迟代码来控制。 由于在所提出的方法中，利用空闲的金属电容，所以可以使用最小量的附加硬件来实现该电路。 由所提出的电路提供的延迟也是存储单元香料特性和核心寄生电容的函数。