公开(公告)号：EP1806640A3

公开(公告)日：2008-05-07

申请号：EP06126405.7

申请日：2006-12-18

Applicant: STMicroelectronics Pvt. Ltd.

Inventor： Mandal, Sajal Kumar

IPC: G05F1/565

CPC classification number: G05F1/575

Abstract: The present invention provides a low dropout (LDO) regulator with a stability compensation circuit. A "zero frequency" tracking as well as "non-dominant parasitic poles' frequency reshaping" are performed to achieve a good phase margin for the LDO by means of the compensation circuit. In this compensation method neither a large load capacitor nor its equivalent series resistance (ESR) is needed to stabilize a regulator. LDO regulators, in system on chip (SoC) application, having load capacitors in the range of few nano-Farads to few hundreds of nano-Farads can be efficiently compensated with this compensation method. A dominant pole for the regulator is realized at an internal node and the second pole at an output node of the regulator is tracked with a variable capacitor generated zero over a range of load current to cancel the effect of each other. A third pole of the system is pushed out above the unity gain frequency of the open loop transfer function with the help of the frequency compensation circuit. The compensation technique is very effective in realizing a low power, low-load-capacitor LDO desirable for system on chip applications.

公开(公告)号：EP1806640A2

公开(公告)日：2007-07-11

申请号：EP06126405.7

申请日：2006-12-18

Applicant: STMicroelectronics Pvt. Ltd.

Inventor： Mandal, Sajal Kumar

IPC: G05F1/565

CPC classification number: G05F1/575

Abstract: The present invention provides a low dropout (LDO) regulator with a stability compensation circuit. A "zero frequency" tracking as well as "non-dominant parasitic poles' frequency reshaping" are performed to achieve a good phase margin for the LDO by means of the compensation circuit. In this compensation method neither a large load capacitor nor its equivalent series resistance (ESR) is needed to stabilize a regulator. LDO regulators, in system on chip (SoC) application, having load capacitors in the range of few nano-Farads to few hundreds of nano-Farads can be efficiently compensated with this compensation method. A dominant pole for the regulator is realized at an internal node and the second pole at an output node of the regulator is tracked with a variable capacitor generated zero over a range of load current to cancel the effect of each other. A third pole of the system is pushed out above the unity gain frequency of the open loop transfer function with the help of the frequency compensation circuit. The compensation technique is very effective in realizing a low power, low-load-capacitor LDO desirable for system on chip applications.

Abstract translation: 本发明提供一种具有稳定补偿电路的低压差（LDO）调节器。 执行“零频”跟踪以及“非显性寄生极”频率整形“，以通过补偿电路为LDO实现良好的相位裕度。 在这种补偿方法中，不需要大的负载电容器及其等效串联电阻（ESR）来稳定稳压器。 LDO调节器在片上系统（SoC）应用中，可以通过这种补偿方法有效地补偿在几纳米法拉范围内的负载电容到几百纳米法拉。 在内部节点实现调节器的主极，并且在负载电流范围内用可变电容器产生零点来跟踪调节器的输出节点处的第二极，以消除彼此的影响。 在频率补偿电路的帮助下，系统的第三极被推出高于开环传递函数的单位增益频率。 补偿技术对于实现片上系统应用所需的低功耗，低负载电容LDO非常有效。