公开(公告)号：US20010053569A1

公开(公告)日：2001-12-20

申请号：US09812717

申请日：2001-03-20

Applicant: STMicroelectronics S.A.

Inventor： Thomas Skotnicki ,  Malgorzata Jurczak ,  Michel Haond

IPC: H01L021/335

CPC classification number: H01L29/66772 ,  H01L29/78648

Abstract: A method for making a MOS transistor includes forming a first gate within a silicon-on-insulator substrate, forming a semiconductor channel region transversely surmounting the first gate, and forming semiconductor drain and source regions on each side of the channel region. The semiconductor channel region and drain and source regions may be produced by epitaxy on an upper surface of the first gate. The channel region may be isolated from the upper surface of the first gate by forming a tunnel under the channel region and at least partially filling the tunnel with a first dielectric. The second gate is formed on the channel region and transverse to the channel region. The second gate may be separated from an upper surface of the channel region by a second dielectric.

Abstract translation: 制造MOS晶体管的方法包括在绝缘体上硅衬底内形成第一栅极，形成横向覆盖第一栅极的半导体沟道区，以及在沟道区的每一侧上形成半导体漏极和源极区。 半导体沟道区域和漏极和源极区域可以通过在第一栅极的上表面上外延生长。 通道区域可以通过在通道区域下形成隧道并且用第一电介质至少部分地填充隧道而与第一栅极的上表面隔离。 第二栅极形成在沟道区域上并且横向于沟道区域。 第二栅极可以通过第二电介质与沟道区的上表面分离。

公开(公告)号：US20010005618A1

公开(公告)日：2001-06-28

申请号：US09738870

申请日：2000-12-15

Applicant: STMicroelectronics S.A.

Inventor： Thomas Skotnicki ,  Malgorzata Jurczak ,  Didier Dutartre

IPC: H01L021/00 ,  H01L021/84 ,  C30B001/00 ,  H01L021/20 ,  H01L021/36

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/0245 ,  H01L21/02507 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/76262 ,  H01L29/0673 ,  H01L29/0676

Abstract: The process for fabricating a network of nanometric lines made of single-crystal silicon on an isolating substrate includes the production of a substrate comprising a silicon body having a lateral isolation defining a central part in the body. A recess is formed in the central part having a bottom wall made of dielectric material, a first pair of opposed parallel sidewalls made of dielectric material, and a second pair of opposed parallel sidewalls. At least one of the opposed parallel sidewalls of the second pair being formed from single-crystal silicon. The method further includes the epitaxial growth in the recess, from the sidewall made of single-crystal silicon of the recess, of an alternating network of parallel lines made of single-crystal SiGe alloy and of single-crystal silicon. Also, the lines made of single-crystal SiGe alloy are etched to form in the recess a network of parallel lines made of single-crystal silicon insulated from each other.

Abstract translation: 用于在隔离衬底上制造由单晶硅制成的纳米线网络的工艺包括制备包含限定主体中心部分的侧向隔离的硅体的衬底。 在具有由电介质材料制成的底壁的中心部分形成凹部，由电介质材料制成的第一对相对的平行侧壁和第二对相对的平行侧壁。 第二对的相对的平行侧壁中的至少一个由单晶硅形成。 该方法还包括从由凹槽的单晶硅制成的侧壁，由单晶SiGe合金和单晶硅制成的平行线的交替网络的凹槽中的外延生长。 此外，由单晶SiGe合金制成的线被蚀刻以在凹槽中形成由彼此绝缘的单晶硅硅制成的平行线的网络。